Atmel Dual Triple DMOS Output Drivers with Serial Input and PWM Control ATA6831 Application Note Download | Manualshive

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9120A–AUTO–01/08

ATA6831/ATA6832 Driver ICs

Figure 4-2.

ATA6831-DK Design Kit, Application Board Component Placement; Top Side,
Top View

Figure 4-3.

ATA6831-DK Design Kit, Application Board Top Side, Top View

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Summary of Contents for Dual Triple DMOS Output Drivers with Serial Input and PWM Control ATA6831

Page 1: ...tors can be combined The IC design particularly supports the application of H bridges to drive DC motors The PWM feature allows a smooth operation of DC motors and BLDC motor control Pro tection against short circuit conditions overtemperature and undervoltage is implemented Various diagnosis functions and a very low quiescent current in standby mode open a wide range of applications Automotive qu...

Page 2: ...2 9120A AUTO 01 08 ATA6831 ATA6832 Driver ICs Figure 1 1 Triple Half bridge DMOS Output Driver with Serial Input Control ATA6831 ...

Page 3: ...pace signal 4 Features Screwless row connector pins for external loads switched by low side or high side drivers Easy and direct adaptation of loads with the ATA6831 design kit Direct switching of loads to VS or GND Fully driver function for VBatt up to 40V Forward reverse rotation of DC motors by full bridge application Paralleling of outputs for powerful applications PC linked via standard SUB D...

Page 4: ... 1 kΩ 10 kΩ BYV28 D1 Serial Interface Input Register Output Register H S 3 L P P S 3 H S 2 L S 2 H S 1 L S 1 S S R O O P P P P L D L H L H H L P S F I N H O V L n u H S 3 L S 3 H S 2 L S 2 H S 1 L S 1 T P C S I n n n n n S 3 3 2 2 1 1 OUT1 OUT2 OUT3 X1 Row Connector 1 GND PWM GND Row Connector 2 X2 Detect Fault Detect Fault Detect Fault Detect Fault Detect Fault Detect Fault Control logic Charge l...

Page 5: ... 9120A AUTO 01 08 ATA6831 ATA6832 Driver ICs Figure 4 2 ATA6831 DK Design Kit Application Board Component Placement Top Side Top View Figure 4 3 ATA6831 DK Design Kit Application Board Top Side Top View ...

Page 6: ...6 9120A AUTO 01 08 ATA6831 ATA6832 Driver ICs Figure 4 4 ATA6831 DK Design Kit Application Board Bottom Side Top View As if PCB were Transparent ...

Page 7: ...Lx will switch the output stage to PWM mode in this case an exter nal PWM signal with 5V COMS logic level and maximum frequency up to 25 kHz has to be applied to the board Any output set to PWM mode is tagged with a dedicated PWM symbol in the software user interface Click the Send Data button to shift the pre adjusted data 16 bits into the input register of the serial peripheral interface The out...

Page 8: ...8 9120A AUTO 01 08 ATA6831 ATA6832 Driver ICs 5 3 Ordering Information Please contact your Atmel Sales Office or Distributor Figure 5 2 Software User Interface ...

Page 9: ...itch output HS1 on 3 LS2 See LS1 4 HS2 See HS1 5 LS3 See LS1 6 HS3 See HS1 7 PL1 Output LS1 additonally controlled by PWM input pin 8 PH1 Output HS1 additonally controlled by PWM input pin 9 PL2 See PL1 10 PH2 See PH1 11 PL3 See PL2 12 PH3 See PH2 13 OLD Open load detection low open load currents are active 14 OCS Overcurrent shutdown high overcurrent shutdown is active 15 SI Software inhibit low ...

Page 10: ...d at motor M1 should be detected HS1 or HS2 has to be switched on while the diametrical low side output register LS2 and LS1 respectively has to be evaluated If INH is activated by software inhibit bit SI all activated loads are switched off but the input and output registers remain set Short circuit detection can easily be demonstrated by intentional false activation of the half bridge components...

Page 11: ...l H bridge arrangement parallel operation of outputs is possible for more powerful applications Two output stages at a time can be paralleled to achieve cur rents up to 2A In any case the IC s maximum power dissipation has to be considered Excellent thermal con tact to an on board cooling area is obligatory for powerful applications Note x do not care for this demonstration if set to high overcurr...

Page 12: ... n u H S 3 T P I N H P S F O C S S R R O V L L S 3 H S 2 L S 2 H S 1 L S 1 s I n u n u n u n u n u Detect Fault Detect Fault Detect Fault Detect Fault Detect Fault Detect Fault Control Logic U5021M WATCHDOG Charge Pump UV Protection Thermal Protection Power on Reset 5 GND 26 GND 13 V CC 19 Microcontroller GND 29 GND 31 OUT1 OUT2 Trigger Reset OUT3 M1 M2 PWM 11 DO 17 CS 6 CLK 10 DI 7 3 22 28 V S 21...

Page 13: ...ral ATA6831s to the microcontroller for applications with a high number of loads A daisy chain arrangement requires only one CS line The data signal is handed over step by step from one ATA6831 to the next as long as CS signal stays low The use of only one CS link however results in slower reaction times as sev eral programming cycles are needed to load the desired setting into each ATA6831 The DI...

Page 14: ...nput registers DI is reached after n 3 shift operations Figure 6 3 Daisy Chain Operation with Microcontroller and Watchdog VCC VCC Reset Trigger Enable CS CLK DO DI INH ATA6831 ATA6831 ATA6831 Micro controller CS CLK DO DI CS CLK DO DI CS CLK DO DI INH INH INH CS CLK DO DI ATA6831 U5021M WATCHDOG Table 6 2 Principal Method of Shifting Datawords Through Daisy chained ICs I O Cycle 0 1 2 IC number 1...

Page 15: ... see Figure 6 4 For detailed information see Application note http www atmel com dyn resources prod_documents doc4987 pdf Figure 6 4 BLDC Motor Control Application BLDC Motor ATA6831 ATA6625 ATmega88 VCC Regulator Battery LIN Charge Pump SPI PWM HALL Protection 16 Bit SPI PWM Diagnosis Watchdog TRX LIN Rx Tx VCC Speed Control Commutation V W U ...

Page 16: ...angement of the ATA6831 s QFN 4 4 mm housing The effect of the cooling area on the PCB can be further improved if the bottom side of the PCB is ground plated and thermal vias are placed along the cooling area Some care should be taken of the copper area s planarity in particular any solder bumps arising at the thermal vias should be avoided Figure 7 1 Recommended Cooling Area Extension and PCB Pin...

Page 17: ...strates this situation The backward current Ib flows from OUTx via the HSx output stage to the VS pin until the capac itor C1 is charged to Vout minus drop across the diode Its value is strongly influenced by the capacitance of C1 but the quality of C1 ESR and any parasitic resistance can also have an impact The recommended range of C1 is 22 µF to 100 µF As stated in the ATA6831 datasheet the maxi...

Page 18: ...vent any damage to the IC s output stages some protective measures have to be implemented Figure 8 3 illustrates the principle protection circuit of the outputs Figure 8 3 Principle Clamping Structure at a Driver Stage The clamping structures at the output stages limit the voltage peak and provide a path for the current after switching off The maximum inductive shutdown energy for ATA6831 is speci...

Page 19: ... supply voltage Vpk in Figure 8 5 gradually charge the blocking capacitor C9 in Figure 8 5 D1 prevents the capacitor from discharging via the power supply Because of the extremely small quiescent current discharging via the IC can also be neglected This means that during long periods in inhibit mode the IC s supply voltage could increase con tinuously until the maximum supply voltage limit of 40V ...

Page 20: ...MPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OU...

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