Atmel AVR180, Application Note

Page: 2 / 12

AVR180
2
Prevents CPU Register Corruption
When the detector keeps the MCU in reset, all CPU activity
is halted. When released from reset, the CPU registers will
all be in their default state. For the duration of the reset, the
General Purpose Register File contents will be preserved.
Without a detector, random CPU activity such as described
in the introduction may cause the CPU registers to get cor-
rupted. Also see “Volatile Memory” below.
Note: The General Purpose Register File contents are not
guaranteed to be preserved during reset in the
AT90S1200, the AT90S8515 and the AT90S4414.
Prevents I/O Register Corruption
When using a detector to keep the MCU in reset, all I/O
registers will be kept in their default state for the duration of
the reset. Consequently, all on-chip peripherals will stay in
their reset state.
Without a detector, random CPU activity such as described
in the introduction may write an unknown value to any I/O
Register. This may cause unexpected behavior of the on-
chip peripherals.
Prevents I/O Pin Random Toggling
A detector will keep the MCU in reset, and all I/O pins will
be kept in their default state for the duration of the reset.
Without a detector, random CPU activity such as described
in the introduction may write a random value to the I/O
Registers. This may cause random toggling of the I/O pins.
Prevents SRAM Corruption
By the use of a detector to keep the MCU in reset, there will
be no accesses to the internal SRAM. The memory con-
tents will keep their present contents for the duration of the
reset.
Without a detector, random CPU activity such as described
in the introduction may write an unknown value to any
SRAM location. Also see “Volatile Memory” below.
Note: The guaranteed preservation of data in internal SRAM
does not apply to the AT90S8515 and 4414. In this
device, the SRAM data is not guaranteed to be pre-
served during reset.
Prevents Non-Volatile Memory Corruption
Non-Volatile memories like EPROM, EEPROM and Flash
are designed to keep their contents even when power is
completely removed from the system. By the use of a
detector to keep the MCU in reset, all activity on the control
lines cease. The memory contents are such prevented
from unintentional writes from the CPU for the duration of
the reset.
Without a detector, random CPU activity such as described
in the introduction may initialize an unintended write to the
non-volatile memory. This may cause random corruption of
the memory contents.
Note: 1. As the AVR CPU is not capable of writing to its own
program memory, the internal Flash Program Mem-
ory contents are never affected by a power failure
situation.
2. For any write to non-volatile memory, a minimum
voltage is required to successfully write the new val-
ues into the memory. If supplied voltage at any time
during the write cycle drops below the minimum volt-
age, the write will fail, corrupting the location
written to.
3. In some AVR devices, when the reset activates dur-
ing a write to the internal EEPROM, the EEPROM
Address Register will be set to zero (0x000). The
result may be seen as corruption of both the location
being written, and of location zero (0x000).
Flash Program Memory
The Internal Flash Program Memory contents are never
affected by a power failure situation. The AVR CPU is inca-
pable of writing to its own program memory.
Volatile Memory
Even when external low voltage detectors halts the CPU,
volatile memory (like Registers and RAM) will eventually
loose their contents if the supply voltage drops below the
minimum voltage required for each memory cell to pre-
serve its current value. When the CPU is halted, the mini-
mum voltage where the AVR internal RAM is guaranteed to
preserve the contents is typically 2.0 volts. Factory tests on
actual silicon have shown that AVR devices may preserve
the RAM contents even down to 0.5 - 1.0 volts.
Implementation
A variety of integrated circuit (IC) solutions are available
from a range of manufacturers. These offer a high accuracy
solution at a low price, typically guaranteeing the threshold
voltage to be within ± 1%. Although the elementary three
pin fixed voltage detector is available, there is also a whole
range of devices offering additional features like reset
pulse stretching, power-on reset time-out, watchdogs,
power regulation, dual supply switching for UPS operation
and more. Included in this application note is a guide to the
world of integrated circuit solutions. As an alternative, this
application note also presents two discrete Low-Power
Supply Voltage RESET detectors.
• Alternative 1: Minimum Power Consumption. Well-suited
for battery-powered applications where power
consumption is the most critical parameter.
• Alternative 2: Minimum Cost. This is a minimum
component cost solution for applications where cost is a
key parameter and power consumption is not critical.