AVR Hardware Design Considerations [APPLICATION NOTE]
Atmel-2521M-AVR-Hardware-Design-Considerations_ApplicationNote_092014
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3.1.1 Shared Use of SPI Programming Lines
If additional devices are connected to the ISP lines, the programmer must be protected from any device, other
than the AVR, that may try to drive the lines. This is especially important with the SPI bus, as it is similar to the
ISP interface. Applying series resistors on the SPI lines, as depicted in
, is the easiest way to achieve
this.
The AVR will never drive the SPI lines in a programming situation, since the AVR is held in RESET to
enter programming mode – and RESET’ing the AVR tri-states all pins.
Figure 3-2.
Connecting the SPI Lines to the ISP Interface
Multiple Atmel AVR in a single application can share the same ISP interface to allow for programming of all the
devices through a minimal interface. However, the AVR devices will all respond to the ISP instructions if special
design considerations are not made.
If it is desired to have only one ISP interface on the target board, the ISP programming can be designed so that
only one of the AVR devices is provided with a SPI clock at a time. All other SPI lines can then be shared. This
way, several AVRs can be located “behind” the same protection resistors, since they are all held in RESET while
the ISP reset line is activated. The gating of the ISP clock can be accomplished by use of, e.g., jumpers or DIP
switches. An alternate solution is to have multiple ISP interfaces, one for each device, all protected as shown in
3.2 JTAG Interface
Some devices have a JTAG interface, which can be used for both programming and debugging. The JTAG lines
are shared with analog input and should be connected so that the JTAG programmer can get control of the lines.
Though JTAG programming tools such as the AVR JTAGICE mkII can drive a resistive load (refer to AVR Studio
®
help for details), capacitive load should in general be avoided.
shows the standard JTAG connector supplied with Atmel ISP programmers. Just as for the SPI
programming connector, the target’s voltage supply is made available to allow for powering of the device or
ensuring correct signal levels when programming.