1.
Getting Started with Atmel ATmega324PB
1.1.
Key Features
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AVR (Harvard) architecture
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Single level pipelining
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In-system reprogrammable flash memory
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Separate EEPROM section available
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Optional boot code section with independent lock bits
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20MIPS @ 20MHz
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Most single clock cycle execution
•
Low-power microcontroller with various sleep modes
•
High code density (advanced RISC Instruction Set)
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On-chip hardware multiplier
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Short interrupt latency four clock cycles
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Factory calibrated internal RC oscillator
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Security with fuses and lock bits
•
Atmel QTouch
®
Library support
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Compatibility between devices (portability)
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Peripheral touch controller
•
Clock Failure Detection (CFD)
Note:
For more information about ATmega324PB, refer to the device datasheet.
1.2.
Device Related Website Links
The ATmega324PB product webpage is available at:
http://www.atmel.com/devices/ATMEGA324PB.aspx
Atmel AT06621: Getting Started with Atmel ATmega324PB [APPLICATION NOTE]
Atmel-42626A-Getting-Started-with-Atmel-ATmega324PB_AT06621_Application Note-03/2016
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