Software Implementation
3-18
ATEVK525 Mass Storage Board for AVR
7740B–AVR–03/08
3.3
Driver limitations
3.3.1
DataFlash
This is a mature driver that will not need to be substantially modified. This driver has
been tested with the AT45DB321 and AT45DB642. If you look at the code, you will
notice a special memory page management if 2 or 4 Dataflash devices are used on the
same bus.
In the case of 2 or 4 DataFlash sharing the same SPI bus (this is not the case here), the
driver can interlace the memory pages to enhance write speed. For contiguous sector
write operations, the driver switches to the next memory as soon as a page
programming operation has been started on the current memory. Inb this way, two or
four contiguous pages (2 KBytes or 512 Bytes according to the memory reference) are
allocated on different memories.
3.3.2
SD/MMC
Like the DataFlash driver, no substantial modifications should be required. The SD and
MMC specification should remain backward compatible with the old releases, so that
this driver only exploits the basic functionalities of the specifications, in order to be
compatible even with old memories.
However, several enhancements can be done to enhance operational timing (write,
read), particularly using multiple block read/write instructions in a “software way”, or by
implementing SD Bus operation, in a more “hardware way”.
3.3.3
NAND Flash
The NAND Flash technology and the consumer request for continually faster and larger
devices conduce to numerous enhancements of memories structure, and thus memory
management drivers.
Limitations:
The COPYBACK feature is not address-dependent in the current driver version. This
means that the instruction is used by the driver to copy a page into another without
regards to the page addresses. But, due to higher capacities, more and more new
devices support COPYBACK on limited zones only: for example a COPYBACK
operation may only be possible between two blocks that share the same half-device
plane, or between odd or even blocks numbers. This may be due to internal structure
of memory (two memory planes, one over the other for example). So the
COPYBACK feature must be disabled in the driver for devices that impose
restrictions about it.
ECC (Error Correction Code) is not implemented in the driver. A basic ECC can
detect 2-bit error and correct 1-bit error per 256 or 512 bytes. However, such a
feature can still be added to the driver. The ECC implementation may result in a
compromise between data reliability and speed performance.
Another feature that should be implemented next is the Recovery option. This option
prevents user halts or disconnections during write operations from destroying the
memory File System structure, by recovering the data lost in the last write
