Atmel AT91EB01, User Manual

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The Debugging System
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hardware on the core and the interface that handles communication between the core's
debug hardware and the host. EmbeddedICE and Multi-ICE have been designed so that
debugging via the JTAG port is as non-intrusive as possible:
■
The target microcontroller does not require special hardware to support debugging
(the debug extensions and the EmbeddedICE macrocell are all that are necessary).
■
The target microcontroller system does not require memory to be set aside for
debugging nor special software to be incorporated to allow debugging.
Note: Although EmbeddedICE and Multi-ICE require no memory on the target to oper-
ate, the target still requires some memory to execute the application code: An
ICE does not provide a memory emulation.
EmbeddedICE and Multi-ICE may pollute the exception vectors if semihosting
and/or vector catch are enabled.
EmbeddedICE and Multi-ICE interact with the target processor by halting execution and
then forcing the processor into debug state to access data required by the debugger via
the JTAG interface. This results in the processor being halted for significant periods of
time, which may cause problems when you are debugging real-time systems.
Angel is invoked by an SWI instruction and does not halt the processor. Instead, control
is passed from the application code to the debug monitor. This may reduce the amount
of dead time when data is accessed on behalf of the debugger. Furthermore, interrupts
can be disabled for the minimum time needed by the debugger, allowing real-time appli-
cation interrupts to be serviced.
AT91EB01 Evaluation Board User Manual