Hardware Manual ver.1.0.1 Pre1
4
3.2. Block Diagram
Armadillo-210 block diagram is shown in Figure 3-1.
SDRAM
256Mbit
Flash
32Mbit
CPU EP9307
SPI/I2S/
ACʼ97CODEC
GPIO
CON5
Memory I/F
Bus
RTC
PLL
16bit
16bit
Ethernet
MAC
9〜48V
3.3V
SW-Reg.
On-Chip
Boot ROM
Timer
Parallel I/O 8bit
32MByte
4MByte
1.8V
SW-Reg.
Video/LCD
Controller
CON2
(D-Sub9)
ARM920T
CON7
(DC Jack)
CON1
(RJ45)
Interrupt
Controller
LED
CON4
PoE I/F
(TPS2375)
USB0
USB1
USB2
Drv/Rcv
(MAX3243)
PHY
(LXT971A)
25MHz
EEPROM
(24LC01)
MAC Address
JP SW
Boot Mode
14.7456MHz
UART2
UART1
UART3
Figure 3-1 Armadillo-210 Block Diagram