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Atmark Techno Armadillo-210, Hardware Manual

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Atmark Techno Armadillo-210 Hardware Manual Download Page 16

                                 Hardware Manual ver.1.0.1 Pre1

   

 

13 

 
 
 

5.11.  LAN Connector LED 

The LED at the bottom of the LAN connector shows status of LAN. 
 

Table 5-12    Status of a LAN Connector LED 

LED 

Name 

ON 

OFF 

Green LINK 

A LAN cable is connected. 
A 10BASE-T or 100BASE-TX link is 
established. 

A LAN cable is not connected or the 
device to which the LAN cable is 
connected is not active. 

Yellow 

LAN 

Data is being transmitted/received. 

No data is transmitted/received. 

 
 
 

5.12.  Structure of a Power Circuit 

The structure of a power circuit in the Armadillo-210 is shown in Figure 5-3.    Be careful not to exceed the 
current capacity limitation when connecting each external device. 
 

1.8V

3.3V

9-48V

48V

Internal 

Circuit

300mA(max)

Internal 

Circuit

250mA(max)

CON9

CON3

DC Jack 

(CON7)

 RJ-45 

(CON1)

800mA(max)

12.95W(max)

600mA(max)

CON4

CON5

DC-DC

DC-DC

PoE I/F

 

 

Figure 5-3    Structure of a Power Circuit in Armadillo-210 

 

 

Summary of Contents for Armadillo-210

Page 1: ...Hardware Manual Version 1 0 1 Pre1 August 11 2006 Atmark Techno Inc http www atmark techno com Official Site http armadillo atmark techno com ...

Page 2: ...ON1 LAN Connector 8 5 3 CON2 CON3 Serial Interface 1 8 5 4 CON4 Serial Interface 2 9 5 5 CON5 Parallel Interface 9 5 6 CON6 External Reset GPIO Terminal 10 5 7 CON7 CON8 Power Input Connector 11 5 8 CON9 Power Output 11 5 9 D1 D2 Status LED 12 5 10 JP1 JP2 Boot Mode Selection Jumpers 12 5 10 1 JP1 Boot ROM Selection Jumper 12 5 10 2 JP2 Bootloader Mode Selection Jumper 12 5 11 LAN Connector LED 13...

Page 3: ...rical Specifications of the Parallel Interface 10 Table 5 8 CON6 Signal Assignment 10 Table 5 9 CON8 Signal Assignment 11 Table 5 10 CON9 Signal Assignment 11 Table 5 11 jumper Setting and Behavior 12 Table 5 12 Status of a LAN Connector LED 13 List of Figures Figure 3 1 Armadillo 210 Block Diagram 4 Figure 5 1 Layout of Interfaces 7 Figure 5 2 Polarity Mark on AC Adapter 11 Figure 5 3 Structure o...

Page 4: ...face and general purpose I O The Armadillo 210 uses Linux as standard operating system OS It allows leveraging a wide variety of software assets which have been developed using open sources It also allows using GNU assembler and C compiler for software development This manual introduces the Armadillo 210 hardware specifications and how to use it We hope the information contained in this document w...

Page 5: ...re and documentation contained in this product are provided AS IS without warranty of any kind including any warranty of merchantability or fitness for a particular purposes reliability correctness or accuracy Furthermore Atmark Techno Inc does not guarantee any outcomes resulting from the use of this product 2 4 Trademarks Armadillo is registered trademarks of Atmark Techno Inc Other product and ...

Page 6: ...over Ethernet compliant with IEEE802 3af Compatible with devices feeding with LAN connector s 4 5 pin pair and 7 8 pin pair Serial Port 2 channels asynchronous Max 230 4kbps COM1 RS232C level input output Flow control pins CTS RTS DTR DSR DCD and RI COM2 3 3V I O level input output No flow control pins General Purpose Parallel Input Output 8bits Timer 16bit general purpose timer 2 channels one cha...

Page 7: ...TC PLL 16bit 16bit Ethernet MAC 9 48V 3 3V SW Reg On Chip Boot ROM Timer Parallel I O 8bit 32MByte 4MByte 1 8V SW Reg Video LCD Controller CON2 D Sub9 ARM920T CON7 DC Jack CON1 RJ45 Interrupt Controller LED CON4 PoE I F TPS2375 USB0 USB1 USB2 Drv Rcv MAX3243 PHY LXT971A 25MHz EEPROM 24LC01 MAC Address JP SW Boot Mode 14 7456MHz UART2 UART1 UART3 Figure 3 1 Armadillo 210 Block Diagram ...

Page 8: ...0000 0x8008 FFFF EP9307 Internal Register AHB 0x8009 0000 0x8009 3FFF Internal Boot ROM 16KByte 0x8009 4000 0x800A FFFF Reserved 0x800B 0000 0x800F FFFF EP9307 Internal Register AHB 0x8010 0000 0x807F FFFF Reserved 0x8080 0000 0x8094 FFFF EP9307 Internal Register APB 0x8095 0000 0x8FFF FFFF Reserved CPU System Register 0x9000 0000 0xBFFF FFFF Reserved 0xC000 0000 0xC07F FFFF SDRAM 8MByte 0xC080 00...

Page 9: ...Flash Memory 4MByte CS6 16bit width 0xC000 0000 0xC1FF FFFF SDRAM 32MByte 0xC200 0000 0xCFFF FFFF Reserved SDCE0 16bit width 0xD000 0000 0xFEFF FFFF Reserved 0xFF00 0000 0xFF08 FFFF EP9307 Internal Register AHB 0xFF09 0000 0xFF09 3FFF Internal Boot ROM 16KByte 0xFF09 4000 0xFF0A FFFF Reserved 0xFF0B 0000 0xFF0F FFFF EP9307 Internal Register AHB 0xFF10 0000 0xFF7F FFFF Reserved 0xFF80 0000 0xFF94 F...

Page 10: ...D Sub9 pin male CON3 Serial Interface 1 10 pin 2 54mm pitch Connector not mounted CON4 Serial Interface 2 5 pin 2 54mm pitch Connector not mounted CON5 Parallel Interface 8bit GPIO 10 pin 2 54mm pitch Connector not mounted CON6 External Reset GPIO terminal 2 pin 2 54mm pitch Connector not mounted CON7 Power Input Connector DC Jack CON8 Power Input Terminal 2 pin 2 54mm pitch Connector not mounted ...

Page 11: ...4 VETH Power over Ethernet IEEE802 3af power supply 5 VETH Power over Ethernet IEEE802 3af power supply 6 RX In Differential twisted pair receive input 7 VETH Power over Ethernet IEEE802 3af power supply 8 VETH Power over Ethernet IEEE802 3af power supply 5 3 CON2 CON3 Serial Interface 1 CON2 and CON3 is an asynchronous serial interface It is connected to UART1 CPU EP9307 CON2 and CON3 differ in s...

Page 12: ... EP9307 z Signal input output level 3 3V I O level z Maximum data transfer rate 230 4kbps z Flow control None z FIFO 16Byte built in for both in and out Table 5 5 CON4 Signal Assignment Pin Signal Name I O Function 1 GPIO In Out Connecting to EP9307 s EGPIO2 Port A 2 pin 2 RXD2 In Connecting to EP9307 s built in UART2 RXD pin 3 TXD2 Out Connecting to EP9307 s built in UART2 TXD pin 4 3 3V Power Po...

Page 13: ... Port B 3 pin Electrical specifications of the parallel interface are shown in Table 5 7 Table 5 7 Electrical Specifications of the Parallel Interface Symbol Parameter Min Max Unit Conditions VIH CMOS Input high voltage 0 65 VDDIO VDDIO 0 3 V VDDIO 3 3V VIL CMOS Input low voltage 0 3 0 35 VDDIO V VOH CMOS Output high voltage 2 8 V IOH 4mA VOL CMOS Output low voltage 0 5 V IOL 4mA IOH High level Ou...

Page 14: ...illo 210 in a very short time interval it may keep in reset mode and not boot up Therefore be sure to leave over 30 milliseconds before restoring power Figure 5 2 Polarity Mark on AC Adapter Table 5 9 CON8 Signal Assignment Pin Signal Name I O Function 1 Power_in Power Operational power input DC9V to 48V 2 GND Power Operational power input GND 5 8 CON9 Power Output CON9 is an external output power...

Page 15: ... use the EP9307 s RDLED PortE 1 in the internal circuit Never change this setting 5 10 JP1 JP2 Boot Mode Selection Jumpers JP1 and JP2 jumpers are used to select the boot mode on Armadillo 210 5 10 1 JP1 Boot ROM Selection Jumper With JP1 shorted the system will boot from the on chip boot ROM When JP1 is open the system will instead load the boot program from the on board flash memory 5 10 2 JP2 B...

Page 16: ...nnected is not active Yellow LAN Data is being transmitted received No data is transmitted received 5 12 Structure of a Power Circuit The structure of a power circuit in the Armadillo 210 is shown in Figure 5 3 Be careful not to exceed the current capacity limitation when connecting each external device 1 8V 3 3V 9 48V 48V Internal Circuit 300mA max Internal Circuit 250mA max CON9 CON3 DC Jack CON...

Page 17: ...rence Circuit A reference circuit when using the CON5 GPIO is shown in Figure 6 1 RY 24V Light LEDCircuit 24VRelayDriveCircuit Push ButtonSwitchInput Circuit Totheoutput port Totheinput port 3 3V Totheoutput port Figure 6 1 Example of a Reference Circuit ...

Page 18: ... Figure 7 1 16 26 13 84 9 00 11 00 2 50 MAX 13 84 MAX 1 27 5 08 12 00 10 16 24 00 15 40 7 60 14 00 2 00 3 00 50 00 34 50 24 50 5 00 4 50 3 00 3 φ3 3 HOLE 37 50 33 00 2 50 15 95 8 33 23 57 47 00 28 50 5 08 1 60 2 54 2 54 2 54 8 50 20 00 12 55 30 80 33 23 Unit mm Figure 7 1 Armadillo 210 Board Layout ...

Page 19: ... Manual ver 1 0 1 Pre1 16 8 Case Layout The layout of the Armadillo 210 case is shown in Figure 8 1 PWR STS 79 00 26 50 2 50 58 70 70 58 4 00 11 00 13 50 13 50 9 00 Unit mm Figure 8 1 Armadillo 210 Case Layout ...

Page 20: ... ver 1 0 1 Pre1 17 9 Appendix 9 1 How to Identify Board Revision The revision of the Armadillo 210 board is silk printed at the position shown in Figure 9 1 Figure 9 1 Armadillo 210 Board Revision Rev C BoardRevision ...

Page 21: ...r Date Revisions 1 0 0 2005 12 15 Initial release 1 0 1 2006 8 11 Added a description about output current in Table 5 4 Table 5 5 and Table 5 6 Added Section 5 9 D1 D2 Status LED Added Section 5 12 Structure of a Power Circuit Added Section 9 1 How to Identify Board Revision ...

Page 22: ...Armadillo 210 Hardware Manual August 11 2006 ver 1 0 1 Pre1 Atmark Techno Inc AFT Building 6F North 5 East 2 Chuo ku Sapporo Hokkaido 060 0035 TEL 011 207 6550 FAX 011 207 6570 ...

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