ASUS I220GC
2-23
2.4.4
Chipset
The Chipset menu allows you to change the advanced chipset settings. Select an
item then press <Enter> to display the sub-menu.
Select Screen
Select Item
+-
Change Field
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
BIOS SETUP UTILITY
Advanced
Enable or Disable
Configure DRAM Timing
by SPD
Advanced Chipset Settings
Configure DRAM Timing by SPD
[Enabled]
Hyper Path 3
[Auto]
DRAM Throttling Threshold
[Auto]
Boot Graphic Adapter Priority [PCI/Int-VGA]
Internal Graphics Mode Select [Enabled, 8MB]
DVMT Mode Select
[DVMT Mode]
DVMT/FIXED Memory
[128MB]
Boot Display Device
[Auto]
High Priority Port Select
[Disabled]
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items. The following sub-items
appear when this item is Disabled. Configuration options: [Disabled] [Enabled]
DRAM CAS# Latency [5 Clocks]
Controls the latency between the SDRAM read command and the time the
data actually becomes available.
Configuration options: [6 Clocks] [5 Clocks] [4 Clocks] [3 Clocks]
DRAM RAS# Precharge [4 Clocks]
Controls the idle clocks after issuing a precharge command to the DDR
SDRAM. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks] [5 Clocks]
[6 Clocks]
DRAM RAS# to CAS# Delay [4 Clocks]
Controls the latency between the DDR SDRAM active command and the
read/write command. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks]
[5 Clocks] [6 Clocks]
DRAM RAS# Activate to Precharge [15 Clocks]
Sets the RAS Activate timing to Precharge timing.
Configuration options: [4 Clock] [5 Clocks] ~ [18 Clocks]
DRAM Write Recovery Time [4 Clocks]
Sets the DRAM Write Recover Time. Configuration options: [2 Clocks] [3
Clocks] [4 Clocks] [5 Clocks] [6 Clocks]
Summary of Contents for I220GC
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