Asus Aaeon PCM-CFS User Manual Download

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Chapter 3

–

AMI BIOS Setup

5.2

”

omp
act

-C

3.5.1.1

LVDS Panel Configuration

Options Summary

LVDS

Disabled

Enabled

Optimal Default, Failsafe Default

Enable/Disabled this panel.
LVDS Panel Type

640x480,18bit,60Hz

800x480,18bit,60Hz

800x600,18bit,60Hz

1024x600,18bit,60Hz

1024x768,18bit,60Hz

1024x768,24bit,60Hz  Optimal Default, Failsafe Default
1280x768,24bit,60Hz
1280x1024,48bit,60Hz
1366x768,24bit,60Hz
1440x900,48bit,60Hz
1600x1200,48bit,60Hz
1920x1080,48bit,60Hz
1920x1200,48bit,60Hz

Select LCD panel used by Internal Graphics Device by selecting the appropriate setup
item.

Summary of Contents for Aaeon PCM-CFS

Page 1: ...Last Updated April 15 2021 PCM CFS 5 25 Compact Board User s Manual 11th Ed ...

Page 2: ...in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to assur...

Page 3: ...istered trademark of Microsoft Corp Intel and Celeron are registered trademarks of Intel Corporation Core is a trademark of Intel Corporation ITE is a trademark of Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties of their respective owners ...

Page 4: ... up your product please make sure the following items have been shipped Item Quantity PCM CFS 1 Jumper Cap 9657666600 1 Backplate for cooler M09KBS9000 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...ansient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device t...

Page 7: ...ion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...osion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent reco...

Page 9: ...元素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...nyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 sti...

Page 11: ...Brightness Control Mode Selection JP5 9 2 3 6 LVDS Operating VDD Backlight Inverter Selection JP6 JP7 10 2 3 7 Clear CMOS Jumper JP8 10 2 3 8 Front Panel Connector JP9 11 2 4 List of Connectors 12 2 4 1 ATX Power Connector CN1 14 2 4 2 Stereo Audio Output Connector CN2 15 2 4 3 DVI Connector CN3 16 2 4 4 Touch Screen Connector CN4 17 2 4 5 RJ 45 Ethernet 1 2 Connector CN5 CN6 19 2 4 6 Ethernet 1 2...

Page 12: ...B 2 0 Ports 4 and 5 CN34 34 2 4 23 USB 2 0 Ports 6 and 7 CN35 35 2 4 24 Battery Connector CN36 35 2 4 25 PS 2 Keyboard Mouse Combo Port 36 2 4 26 LVDS Port 1 CN38 36 2 4 27 LVDS Port 2 CN39 38 2 4 28 5V Output for SATA HDD 39 2 4 29 SATA Port Connector CN41 CN42 CN43 40 2 4 30 CPU Fan Connector CN44 40 2 4 31 System Fan Connector CN45 41 2 4 32 Digital IO Port 1 Port 2 Connector CN46 CN50 41 2 4 3...

Page 13: ... Configuration 66 3 4 5 4 Serial Port 4 Configuration 67 3 4 5 5 Serial Port 5 Configuration 68 3 4 5 6 Serial Port 6 Configuration 69 3 4 5 7 Serial Port 7 Configuration 70 3 4 5 8 Serial Port 8 Configuration 71 3 4 5 9 Serial Port 9 Configuration 72 3 4 5 10 Serial Port 10 Configuration 73 3 4 6 AMT Configuration 74 3 4 7 PCI Express Configuration 75 3 4 8 Firmware Update Configuration 76 3 4 9 ...

Page 14: ...wnload Installation 93 Appendix A Watchdog Timer Programming 95 A 1 Watchdog Timer Registers 96 A 2 Watchdog Sample Program 97 Appendix B I O Information 100 B 1 I O Address Map 101 B 2 Memory Address Map 103 B 3 IRQ Mapping Chart 104 Appendix C Digital I O Ports 107 C 1 Digital I O Register 108 C 2 Digital I O Sample Code 4 in 4 out 2 low 2 high 111 Appendix D Mating Connectors and Cables 112 D 1...

Page 15: ...5 25 Compact Board PCM CFS Chapter 1 Chapter 1 Product Specifications ...

Page 16: ... x 2 Max Memory Capacity Up to 32GB BIOS UEFI only Wake on LAN Yes Watchdog Timer 255 Levels Power Requirement ATX Power Supply Type ATX Power Consumption Typical CPU 65W TDP Dimension L x W 203mm x 146mm Operating Temperature 32 F 122 F 0 C 50 C Storage Temperature 4 F 176 F 20 C 80 C Operating Humidity 0 90 at 40 C non condensing MTBF Hours TBD Certification CE FCC Class A Display VGA LCD Contro...

Page 17: ...211 x 1 Audio ALC269 With Amplifier USB Port USB 3 2 Gen 1 x 4 headers USB 2 0 x 4 headers Serial Port RS232 x 8 headers RS232 422 485 x 2 headers Parallel Port HDD Interface SATA III 6 0 Gb s x 3 FDD Interface SSD Expansion Slot M 2 3042 2280 Slot B key x 1 M 2 2280 Slot M key x 1 Half size mPCIe x 1 SMBus I2C LPC x 1 DIO 16 bit SIM TPM TPM 2 0 Touch ...

Page 18: ...5 25 Compact Board PCM CFS Chapter 2 Chapter 2 Hardware Information ...

Page 19: ...Chapter 2 Hardware Information 5 5 25 Compact Board PCM CFS 2 1 Dimensions ...

Page 20: ...Chapter 2 Hardware Information 6 5 25 Compact Board PCM CFS 2 2 Jumpers and Connectors Processor Side ...

Page 21: ...Chapter 2 Hardware Information 7 5 25 Compact Board PCM CFS Solder Side CN47 CN48 CN49 ...

Page 22: ...P3 COM6 Pin 9 Function Selection JP4 Auto Power Button Enable Disable Selection JP5 LVDS Port 1 and Port 2 Backlight Brightness Control Mode Selection JP6 LVDS Port 1 Operating VDD Selection Backlight Inverter VCC Selection JP7 LVDS Port 2 Operating VDD Selection Backlight Inverter VCC Selection JP8 Clear CMOS Jumper JP9 Front Panel Connector 2 3 1 Touch Screen 4 5 Wire Mode Selection JP1 4 Wire M...

Page 23: ...nable AT Note When Disable is selected JP4 pins 1 2 the power button is required to power on the system Front Panel JP9 needs to be set to pins 1 2 to use power button 2 3 5 LVDS Port Backlight Brightness Control Mode Selection JP5 Port 1 VR Mode Default PWM Mode Port 2 VR Mode Default PWM Mode Note To avoid damage to components do not use any other configuration for JP5 than those shown above ...

Page 24: ...acklight Inverter Selection JP6 JP7 Operating VDD Selection 3 3V Default 5V Backlight Inverter VCC Selection 12V 5V Default Note To avoid damage to components do not use any other configuration for JP6 or JP7 than those shown above 2 3 7 Clear CMOS Jumper JP8 Disable ATX Default Enable AT ...

Page 25: ...ardware Information 11 5 25 Compact Board PCM CFS 2 3 8 Front Panel Connector JP9 Pin Pin Name Pin Pin Name 1 PWR_BTN 2 PWR_BTN 3 HDD_LED 4 HDD_LED 5 SPEAKER 6 SPEAKER 7 PWR_LED 8 PWR_LED 9 H W RESET 10 H W RESET ...

Page 26: ... CN4 Touch Screen Connector CN5 RJ 45 Ethernet 1 Connector CN6 RJ 45 Ethernet 2 Connector CN7 Ethernet 1 Connector Optional CN8 Ethernet 2 Connector Optional CN9 Audio In Out and MIC Connector CN10 CRT Connector CN11 Mini Card Slot Half Size CN12 Ethernet 1 LED Indicator CN13 Nano SIM Card Connector CN14 COM Port 1 CN15 COM Port 2 CN16 Ethernet 2 LED Indicator CN17 COM Port 3 CN18 COM Port 4 CN19 ...

Page 27: ...DS Port 2 Inverter Backlight Connector CN34 USB 2 0 Ports 4 and 5 CN35 USB 2 0 Ports 6 and 7 CN36 Battery CN37 PS 2 Keyboard Mouse Combo Port CN38 LVDS Port 1 CN39 LVDS Port 2 CN40 5V Output for SATA HDD CN41 SATA Port 1 Connector CN42 SATA Port 0 Connector CN43 SATA Port 2 Connector CN44 CPU Fan Connector CN45 System Fan Connector CN46 Digital IO Port 1 Connector CN47 M 2 2280 B Key Slot CN48 M 2...

Page 28: ... Name Signal Type Signal level 1 3 3V PWR 3 3V 2 3 3V PWR 3 3V 3 GND GND 4 5V PWR 5V 5 GND GND 6 5V PWR 5V 7 GND GND 8 PWR_OK 9 5VSB PWR 5V 10 12V PWR 12V 11 12V PWR 12V 12 3 3V PWR 3 3V 13 3 3V PWR 3 3V 14 12V PWR 12V 15 GND GND 16 PS_ON 17 GND GND 18 GND GND 19 GND GND 20 NC PIN1 PIN13 PIN12 PIN24 ...

Page 29: ...CM CFS Pin Pin Name Signal Type Signal level 21 5V PWR 5V 22 5V PWR 5V 23 5V PWR 5V 24 GND GND 2 4 2 Stereo Audio Output Connector CN2 Pin Pin Name Signal Type Signal level 1 SPK_OUT_R OUT 2 SPK_OUT_R OUT 3 SPK_OUT_L OUT 4 SPK_OUT_L OUT PIN4 PIN3 PIN2 PIN1 ...

Page 30: ...nal level 1 TMDS_DAT2 DIFF 2 TMDS_DAT2 DIFF 3 GND GND 4 NC I O 5 NC I O 6 DVI_DDC_CLK I O 5V 7 DVI_DDC_DATA I O 5V 8 VSYNC OUT 9 TMDS_DAT1 DIFF 10 TMDS_DAT1 DIFF 11 GND GND 12 NC 13 NC 14 5V PWR 5V 15 GND GND 16 HPLG_DETECT IN 17 TMDS_DAT0 DIFF 18 TMDS_DAT0 DIFF 19 GND GND 20 NC 21 NC 1 9 C1 C5 C2 C3 C4 17 8 16 24 ...

Page 31: ..._CLK DIFF 24 TMDS_CLK DIFF C1 RED OUT C2 GREEN OUT C3 BLUE OUT C4 HSYNC OUT C5 GND GND C6 GND GND 2 4 4 Touch Screen Connector CN4 Note Touch mode is set by Touch Screen Mode Selection JP1 8 Wire Mode Pin Pin Name Signal Type Signal level 1 GND GND 2 TOP EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN ...

Page 32: ...oard PCM CFS 8 Wire Mode Pin Pin Name Signal Type Signal level 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN 4 Wire Mode Pin Pin Name Signal Type Signal level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC ...

Page 33: ...CM CFS 5 Wire Mode Pin Pin Name Signal Type Signal level 1 GND GND 2 UL Y IN 3 UR H IN 4 LL L IN 5 LR X IN 6 SENSE S IN 7 NC 8 NC 9 NC 2 4 5 RJ 45 Ethernet 1 2 Connector CN5 CN6 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 1 8 ...

Page 34: ...IFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 4 6 Ethernet 1 2 Connector Optional CN7 CN8 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI1 DIFF 5 GND GND 6 GND GND 7 MDI2 DIFF 8 MDI2 DIFF 9 MDI3 DIFF 10 MDI3 DIFF MDI0 MDI1 GND MDI2 MDI3 MDI0 1 2 9 10 MDI1 GND MDI2 MDI3 ...

Page 35: ...e Signal Type Signal level 1 MIC_R IN 2 MIC_L IN 3 GND_AUDIO GND 4 NC 5 LINE_L_IN IN 6 NC 7 LINE_R_IN IN 8 NC 9 GND_AUDIO GND 10 NC 11 LEFT_OUT OUT 12 RIGHT_OUT OUT 13 GND_AUDIO GND 14 GND_AUDIO GND MIC_L NC NC NC NC MIC_R 1 2 13 14 GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT RIGHT_OUT GND_AUDIO GND_AUDIO ...

Page 36: ...D SUB CRT Connector CN10 Pin Pin Name Signal Type Signal level 1 RED OUT 2 GREEN OUT 3 BLUE OUT 4 NC 5 GND GND 6 RED_GND_RTN GND 7 GREEN_GND_RTN GND 8 BLUE_GND_RTN GND 9 5V PWR 5V 10 NC 11 NC 12 DDC_DATA I O 5V 13 HSYNC OUT 14 VSYNC OUT 15 DDC_CLK I O 5V 1 6 10 11 15 5 ...

Page 37: ... 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V ...

Page 38: ...DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND ...

Page 39: ... LED Indicator CN12 CN16 Pin Pin Name Signal Type Signal level 1 ACT_LED PWR 5V 2 ACT_LED OUT 3 100_LED PWR 5V 4 100_LED OUT 5 1000_LED PWR 5V 6 1000_LED OUT 2 4 11 Nano SIM Card Connector CN13 Pin Pin Name Signal Type Signal level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 GND GND 5 UIM_VPP PWR 6 UIM_DATA I O PIN1 PIN2 PIN4 PIN6 PIN3 PIN5 ...

Page 40: ...mpact Board PCM CFS 2 4 12 COM Port 1 3 4 5 CN14 CN17 CN18 CN19 Pin Pin Name Signal Type Signal level 1 DCD IN 2 RX IN 3 TX OUT 9V 4 DTR OUT 9V 5 GND GND 6 DSR IN 7 RTS OUT 9V 8 CTS IN 9 RI IN 10 NC RX DTR DSR CTS NC DCD 1 2 9 10 TX GND RTS RI ...

Page 41: ...5 can be set by BIOS see Chatper 3 Default setting is RS 232 Pin 9 function can be set by COM2 Pin 9 Function Jumper JP2 for Port 2 and COM6 Pin 9 Function Jumper JP3 for Port 6 RS 232 Mode Pin Pin Name Signal Type Signal level 1 DCD IN 2 RX IN 3 TX OUT 5V 4 DTR OUT 5V 5 GND GND 6 DSR IN 7 RTS OUT 5V 8 CTS IN 9 RI 5V 12V IN PWR 5V 12V 10 NC ...

Page 42: ...pter 2 Hardware Information 28 5 25 Compact Board PCM CFS RS 485 Mode Pin Pin Name Signal Type Signal level 1 RS485_D I O 5V 2 RS485_D I O 5V 3 NC 4 NC 5 GND GND 6 NC 7 NC 8 NC 9 NC 5V 12V PWR 5V 12V 10 NC ...

Page 43: ...dware Information 29 5 25 Compact Board PCM CFS RS 422 Mode Pin Pin Name Signal Type Signal level 1 RS422_TX OUT 5V 2 RS422_TX OUT 5V 3 RS422_RX IN 4 RS422_RX IN 5 GND GND 6 NC 7 NC 8 NC 9 NC 5V 12V PWR 5V 12V 10 NC ...

Page 44: ... CN21 Pin Pin Name Signal Type Signal level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 SMB_DATA I O 3 3V 11 SMB_CLK OUT 3 3V 12 SERIRQ I O 3 3V 2 4 15 PCI Slot CN22 Standard specification ...

Page 45: ...N28 CN29 Pin Pin Name Signal Type Signal level 1 DCD IN 2 RX IN 3 TX OUT 9V 4 DTR OUT 9V 5 GND GND 6 DSR IN 7 RTS OUT 9V 8 CTS IN 9 RI IN 10 NC 2 4 17 PCI Express x16 Slot CN25 Standard specification 2 4 18 DDR SO DIMM Slot CN26 27 Standard specification RX DTR DSR CTS NC DCD 1 2 9 10 TX GND RTS RI ...

Page 46: ... Type Signal level 1 5VSB PWR 5V 2 USB2_SSRX DIFF 3 USB2_SSRX DIFF 4 GND GND 5 USB2_SSTX DIFF 6 USB2_SSTX DIFF 7 GND GND 8 USB2_D DIFF 9 USB2_D DIFF 10 NC 11 USB3_D DIFF 12 USB3_D DIFF 13 GND GND 14 USB3_SSTX DIFF 15 USB3_SSTX DIFF 16 GND GND 17 USB3_SSRX DIFF 18 USB3_SSRX DIFF 19 5VSB PWR 5V PIN19 PIN1 PIN10 PIN11 ...

Page 47: ... Type Signal level 1 5VSB PWR 5V 2 USB0_SSRX DIFF 3 USB0_SSRX DIFF 4 GND GND 5 USB0_SSTX DIFF 6 USB0_SSTX DIFF 7 GND GND 8 USB0_D DIFF 9 USB0_D DIFF 10 NC 11 USB1_D DIFF 12 USB1_D DIFF 13 GND GND 14 USB1_SSTX DIFF 15 USB1_SSTX DIFF 16 GND GND 17 USB1_SSRX DIFF 18 USB1_SSRX DIFF 19 5VSB PWR 5V PIN19 PIN1 PIN10 PIN11 ...

Page 48: ..._ENABLE OUT 5V Note LVDS1 BKL_PWR can be set by JP6 BKL_CTL can be set by JP5 Pins 1 3 5 Note LVDS2 BKL_PWR can be set by JP7 BKL_CTL can be set by JP5 Pins 2 4 6 2 4 22 USB 2 0 Ports 4 and 5 CN34 Pin Pin Name Signal Type Signal level 1 5VSB PWR 5V 2 GND GND 3 USB4_D DIFF 4 GND GND 5 USB4_D DIFF 6 USB5_D DIFF BLK_PWR 2 3 4 5 1 BKL_CONTROL GND GND BKL_ENABLE GND GND USB5_D USB5_D 5V 5V 1 2 9 10 USB...

Page 49: ...2 4 23 USB 2 0 Ports 6 and 7 CN35 Pin Pin Name Signal Type Signal level 1 5VSB PWR 5V 2 GND GND 3 USB6_D DIFF 4 GND GND 5 USB6_D DIFF 6 USB7_D DIFF 7 GND GND 8 USB7_D DIFF 9 GND GND 10 5VSB PWR 5V 2 4 24 Battery Connector CN36 Pin Pin Name Signal Type Signal level 1 3 3V PWR 3 3V 2 GND GND GND GND USB5_D USB5_D 5V 5V 1 2 9 10 USB4_D USB4_D GND GND ...

Page 50: ...vel 1 KB_ DATA I O 5V 2 KB_CLK I O 5V 3 GND GND 4 5VSB PWR 5V 5 MS_DATA I O 5V 6 MS_CLK I O 5V 2 4 26 LVDS Port 1 CN38 Note LCD_PWR can be set by Jumper JP6 Pin Pin Name Signal Type Signal level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 LCD_PWR PWR 3 3V 5V 4 GND GND KB_CLK KB_DATA 1 4 6 2 MS_DATA 5VSB GND MS_CLK PIN 1 PIN 2 PIN 30 PIN 29 ...

Page 51: ...DA0 DIFF 10 LVDS_DA0 DIFF 11 LVDS_DA1 DIFF 12 LVDS_DA1 DIFF 13 LVDS_DA2 DIFF 14 LVDS_DA2 DIFF 15 LVDS_DA3 DIFF 16 LVDS_DA3 DIFF 17 DDC_DATA I O 3 3V 18 DDC_CLK I O 3 3V 19 LVDS_DB0 DIFF 20 LVDS_DB0 DIFF 21 LVDS_DB1 DIFF 22 LVDS_DB1 DIFF 23 LVDS_DB2 DIFF 24 LVDS_DB2 DIFF 25 LVDS_DB3 DIFF 26 LVDS_DB3 DIFF 27 LCD_PWR PWR 3 3V 5V 28 GND GND 29 LVDS_B_CLK DIFF 30 LVDS_B_CLK DIFF ...

Page 52: ...Pin Name Signal Type Signal level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 LCD_PWR PWR 3 3V 5V 4 GND GND 5 LVDS_A_CLK DIFF 6 LVDS_A_CLK DIFF 7 LCD_PWR PWR 3 3V 5V 8 GND GND 9 LVDS_DA0 DIFF 10 LVDS_DA0 DIFF 11 LVDS_DA1 DIFF 12 LVDS_DA1 DIFF 13 LVDS_DA2 DIFF 14 LVDS_DA2 DIFF 15 LVDS_DA3 DIFF 16 LVDS_DA3 DIFF PIN 1 PIN 2 PIN 30 PIN 29 ...

Page 53: ...8 DDC_CLK I O 3 3V 19 LVDS_DB0 DIFF 20 LVDS_DB0 DIFF 21 LVDS_DB1 DIFF 22 LVDS_DB1 DIFF 23 LVDS_DB2 DIFF 24 LVDS_DB2 DIFF 25 LVDS_DB3 DIFF 26 LVDS_DB3 DIFF 27 LCD_PWR PWR 3 3V 5V 28 GND GND 29 LVDS_B_CLK DIFF 30 LVDS_B_CLK DIFF 2 4 28 5V Output for SATA HDD Pin Pin Name Signal Type Signal level 1 5V PWR 5V 2 GND GND 5V GND ...

Page 54: ...in Pin Name Signal Type Signal level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND 2 4 30 CPU Fan Connector CN44 Pin Pin Name Signal Type Signal level 1 GND GND 2 FAN_POWER PWR 12V 3 FAN_TAC IN 4 FAN_CTL OUT 3 3V Pin 1 Pin 7 GND 1 2 3 FAN_POWER FAN_TAC 4 FAN_CTL ...

Page 55: ...WR 12V 3 FAN_TAC IN 4 FAN_CTL OUT 3 3V 2 4 32 Digital IO Port 1 Port 2 Connector CN46 CN50 Pin Pin Name Signal Type Signal level 1 DIO0 I O 5V 2 DIO1 I O 5V 3 DIO2 I O 5V 4 DIO3 I O 5V 5 DIO4 I O 5V 6 DIO5 I O 5V 7 DIO6 I O 5V 8 DIO7 I O 5V 9 5V PWR 5V 10 GND GND GND 1 2 3 FAN_POWER FAN_TAC 4 FAN_CTL DIO1 DIO3 DIO5 DIO7 GND DIO0 1 2 9 10 DIO2 DIO4 DIO6 5V ...

Page 56: ...in Name Signal Type Signal level 1 CONFIG3 GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V 5 GND GND 6 NC 7 USB_D DIFF 8 W_DISABLE OUT 9 USB_D DIFF 10 SATA_LED IN 3 3V 11 GND GND 20 NC 21 CONFIG0 GND 22 NC 23 NC 24 NC 25 NC 26 NC 27 GND GND 28 NC 29 PCIE_RX DIFF 30 NC 31 PCIE_RX DIFF 32 NC 33 GND GND ...

Page 57: ...35 PCIE_TX DIFF 36 NC 37 PCIE_TX DIFF 38 NC OUT 39 GND GND 40 NC 41 SATA_RX DIFF 42 NC 43 SATA_RX DIFF 44 NC 45 GND GND 46 NC 47 SATA_TX DIFF 48 NC 49 SATA_TX DIFF 50 PERST OUT 3 3V 51 GND GND 52 PCIE_CLK_REQ IN 3 3V 53 PCIE_CLK DIFF 54 PCIE_WAKE IN 3 3V 55 PCIE_CLK DIFF 56 NC 57 GND GND 58 NC 59 NC 60 NC ...

Page 58: ...2 NC 63 NC 64 NC 65 NC 66 NC 67 NC 68 NC 69 CONFIG1 GND 70 3 3V PWR 3 3V 71 GND GND 72 3 3V PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 CONFIG2 GND 2 4 34 M 2 2280 M Key Slot CN48 Pin Pin Name Signal Type Signal level 1 GND GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V 5 PCIE3_RX DIFF 6 NC 7 PCIE3_RX DIFF 8 NC ...

Page 59: ...D IN 3 3V 11 PCIE3_TX GND 12 3 3V PWR 3 3V 13 PCIE3_TX GND 14 3 3V PWR 3 3V 15 GND GND 16 3 3V PWR 3 3V 17 PCIE2_RX DIFF 18 3 3V PWR 3 3V 19 PCIE2_RX DIFF 20 NC 21 GND GND 22 NC 23 PCIE2_TX DIFF 24 NC 25 PCIE2_TX DIFF 26 NC 27 GND GND 28 NC 29 PCIE1_RX DIFF 30 NC 31 PCIE1_RX DIFF 32 NC 33 GND GND 34 NC 35 PCIE1_TX DIFF ...

Page 60: ...NC 37 PCIE1_TX DIFF 38 DECSLP OUT 39 GND GND 40 NC 41 PCIE0_RX DIFF 42 NC 43 PCIE0_RX DIFF 44 NC 45 GND GND 46 NC 47 PCIE0_TX DIFF 48 NC 49 PCIE0_TX DIFF 50 PERST OUT 51 GND GND 52 PCIE_CLK_REQ IN 53 PCIE_CLK DIFF 54 PCIE_WAKE IN 55 PCIE_CLK DIFF 56 NC 57 GND GND 58 NC 67 NC 68 NC 69 NC 70 3 3V PWR 3 3V ...

Page 61: ...PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 GND GND 2 4 35 SPI Flash Programming Port CN49 Pin Pin Name Signal Type Signal level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC 2 4 36 ATX 12V Power Connector CN51 Standard Specifications P IN 1 P IN 2 P IN 3 P IN 4 P IN 5 P IN 6 P IN 7 ...

Page 62: ...Chapter 2 Hardware Information 48 5 25 Compact Board PCM CFS 2 5 Block Diagram ...

Page 63: ...5 25 Compact Board PCM CFS Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 64: ...rification routines check the current system configuration against the values stored in the CMOS memory If they do not match an error message will be output and the BIOS setup program will need to be run to set the configuration information in memory There are three situations in which the CMOS settings will need to be set or changed Starting the system for the first time The system hardware has b...

Page 65: ...ed off To enter BIOS Setup press Del or ESC immediately after powering on the system The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Configure settings for system hardware Chipset For host bridge parameters Boot Enable Disable quiet boot option and set boot priorities Security The setup administrator password ...

Page 66: ...Chapter 3 AMI BIOS Setup 52 5 25 Compact Board PCM CFS 3 3 Main ...

Page 67: ...Chapter 3 AMI BIOS Setup 53 5 25 Compact Board PCM CFS 3 4 Advanced ...

Page 68: ...ol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA256 PCR Bank Pending Operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Your Computer will reboot during restart in ...

Page 69: ... Support TCG_1_2 the Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 2 1 3 Optimal Default Failsafe Default Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select TPM 1 2 Optimal Default Failsafe Default TPM 2 0 Auto TPM 1 2 will restrict support to TPM 1 2...

Page 70: ...efault Failsafe Default 1 Number of cores to enable in each processor package Intel VMX Virtualization Technology Disabled Enabled Optimal Default Failsafe Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology C States Disabled Enabled Optimal Default Failsafe Default Enable Disable CPU Power Management Allows CPU to go to C states when it s ...

Page 71: ...dStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Turbo Mode Disabled Enabled Optimal Default Failsafe Default Enable Disable processor Turbo Mode requires Intel Speed Step or Intel Speed Shift to be available and enabled ...

Page 72: ...e SATA Device SATA Mode Selection AHCI Optimal Default Failsafe Default Intel RST Premium With Intel Optane System Acceleration Determines how SATA controller s operate Port 0 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable Table Continues on Next Page ...

Page 73: ...g Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable Port 2 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable M 2 Key B CN47 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port ...

Page 74: ...Chapter 3 AMI BIOS Setup 60 5 25 Compact Board PCM CFS 3 4 4 Hardware Monitor Options Summary Smart Fan Disable Enable Optimal Default Failsafe Default Enables or Disables Smart Fan ...

Page 75: ...ation Output PWM mode push pull Fan 1 Smart Fan Control Manual RPM Mode Manual Duty Mode Auto RPM Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU Temperature System Temperature 2 Optimal Default Failsafe Default System Temperature 1 Select the monitored temperature source for this fan Table Continues on Next Page ...

Page 76: ...n Output PWM mode push pull Fan 2 Smart Fan Control Manual RPM Mode Manual Duty Mode Auto RPM Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU Temperature System Temperature 2 Optimal Default Failsafe Default System Temperature 1 Select the monitored temperature source for this fan Duty Cycle 1 85 Temperature 1 60 Auto fan speed control Fan sp...

Page 77: ...Chapter 3 AMI BIOS Setup 63 5 25 Compact Board PCM CFS 3 4 5 SIO Configuration ...

Page 78: ... This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 79: ... Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 80: ...This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 280h IRQ 11 IO 288h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 81: ...This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 288h IRQ 11 IO 280h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 82: ...This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2A0h IRQ 11 IO 2A8h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 83: ...Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2A8h IRQ 11 IO 2A0h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 84: ... This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3E8h IRQ 7 IO 2E8h IRQ 7 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 85: ... This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2E8h IRQ 7 IO 3E8h IRQ 7 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 86: ... This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2B8h IRQ 7 IO 2C8h IRQ 7 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 87: ...e This Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2B8h IRQ 7 IO 2C8h IRQ 7 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 88: ...T Configuration Options Summary AMT BIOS Features Disable Enable Optimal Default Failsafe Default When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx Setup Note This option does not disable Manageability Features in FW ...

Page 89: ...t Board PCM CFS 3 4 7 PCI Express Configuration Options Summary PCIe Slot Disable Enable Optimal Default Failsafe Default Control the PCI Express Root Port PCIe Speed Auto Optimal Default Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed ...

Page 90: ... AMI BIOS Setup 76 5 25 Compact Board PCM CFS 3 4 8 Firmware Update Configuration Options Summary Me FW Image Re Flash Disable Optimal Default Failsafe Default Enable Enable Disable Me FW Image Re Flash function ...

Page 91: ...er mode State After G3 Always On Always Off Last State Optimal Default Failsafe Default Specify what state to go to when power is re applied after a power failure G3 state RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time Fixed Time System will wake on the hr min sec specified n Dynamic Time System will wake on the current time Increase minute s ...

Page 92: ...78 5 25 Compact Board PCM CFS 3 4 10 Digital IO Port Configuration Options Summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output level when DIO pin is output ...

Page 93: ...Chapter 3 AMI BIOS Setup 79 5 25 Compact Board PCM CFS 3 5 Chipset ...

Page 94: ...Chapter 3 AMI BIOS Setup 80 5 25 Compact Board PCM CFS 3 5 1 North Bridge ...

Page 95: ...anel Type 640x480 18bit 60Hz 800x480 18bit 60Hz 800x600 18bit 60Hz 1024x600 18bit 60Hz 1024x768 18bit 60Hz 1024x768 24bit 60Hz Optimal Default Failsafe Default 1280x768 24bit 60Hz 1280x1024 48bit 60Hz 1366x768 24bit 60Hz 1440x900 48bit 60Hz 1600x1200 48bit 60Hz 1920x1080 48bit 60Hz 1920x1200 48bit 60Hz Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item ...

Page 96: ...pe Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz Optimal Default Failsafe Default 500Hz 1KHz 2 2KHz 6 5KHz Select PWM frequency of backlight control signal ...

Page 97: ...CFS 3 5 1 2 PEG Port Configuration Options Summary Enable Root Port Disabled Enabled Auto Optimal Default Failsafe Default Enable or Disable the Root Port Max Link Speed Auto Gen1 Gen2 Gen3 Optimal Default Failsafe Default Configure PEG 0 1 0 Max Speed ...

Page 98: ...ed HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled PCH Lan Controller Disabled Enabled Optimal Default Failsafe Default Enable Disable onboard NIC M 2 CN47 Slot Function SATA Optimal Default Failsafe Default PCIe Select function enabled for M 2 Slot CN47 slot M 2 CN48 Slot Function SATA PCIe Optimal Default Failsafe Default Select function enabled for M 2 Slot CN48...

Page 99: ...ser enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to remove and e...

Page 100: ... is in User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mo...

Page 101: ... mode The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device Enroll Efi Image Allow the image to run in Secure Boot mode Enroll...

Page 102: ...elete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append OsRecovery Signatures Update Append Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_C...

Page 103: ... Board PCM CFS 3 7 Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enable or Disable showing boot logo LAN UEFI PXE Driver Disabled Optimal Default Failsafe Default Enabled Enabled Disable LAN UEFI PXE Driver ...

Page 104: ...Chapter 3 AMI BIOS Setup 90 5 25 Compact Board PCM CFS 3 7 1 BBS Priorities ...

Page 105: ...Chapter 3 AMI BIOS Setup 91 5 25 Compact Board PCM CFS 3 8 Save Exit ...

Page 106: ...5 25 Compact Board PCM CFS Chapter 4 Chapter 4 Drivers Installation ...

Page 107: ...m If you have questions about other OS installations please contact AAEON support Step 1 Install Chipset Drivers 1 Open the Step1 Chipset folder 2 Run the SetupChipset exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 2 Install Graphics Drivers 1 Open the Step2 Graphic folder 2 Run the igxpin exe file in the folder 3 Follow the instructions 4 Drivers w...

Page 108: ... then the OS folder 2 Run the SetupSerialIO exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 6 Install ME Drivers 1 Open the Step6 ME folder 2 Run the SetupME exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 7 Install Serial Port Driver Optional 1 Open the Step7 Serial Port Driver Optional 2 Run the Finte...

Page 109: ...5 25 Compact Board PCM CFS Appendix A Appendix A Watchdog Timer Programming ...

Page 110: ...e 0x00 7 1 Enable Disable time out output via WDTRST 0 Disable 1 Enable Pulse Width 0x05 0 1 01 Width of Pulse signal 00 1ms do not use 01 25ms 10 125ms 11 5s Pulse width is must longer then 16ms Signal Polarity 0x05 2 0 0 low active 1 high active Must set this bit to 0 Counting Unit 0x05 3 0 Select time unit 0 second 1 minute Output Signal Type 0x05 4 1 0 Level 1 Pulse Must set this bit to 1 Watc...

Page 111: ...g 0x05 Timer register define PSWidthBit 0x00 WDTRST Pulse width Bit0 1 define PSWidthVal 0x01 25ms for WDTRST pulse define PolarityBit 0x02 WDTRST Signal polarity Bit2 define PolarityVal 0x00 Low active for WDTRST define UnitBit 0x03 Unit for timer Bit3 define ModeBit 0x04 WDTRST mode Bit4 define ModeVal 0x01 0 level 1 pulse define EnableBit 0x05 WDT timer enable Bit5 define EnableVal 0x01 1 enabl...

Page 112: ...Value If Value 1 WDTSetBit TimerReg EnableBit 1 else WDTSetBit TimerReg EnableBit 0 VOID WDTParameterSetting byte Counter BOOLEAN Unit Watchdog Timer counter setting WDTWriteByte CounterReg Counter WDT counting unit setting WDTSetBit TimerReg UnitBit Unit WDT output mode set to pulse WDTSetBit TimerReg ModeBit ModeVal WDT output mode set to active low WDTSetBit TimerReg PolarityBit PolarityVal WDT...

Page 113: ...yte byte Register byte Value IOWriteByte WDTAddr Register Value byte WDTReadByte byte Register return IOReadByte WDTAddr Register VOID WDTSetBit byte Register byte Bit byte Val byte TmpValue TmpValue WDTReadByte Register TmpValue 1 Bit TmpValue Val Bit WDTWriteByte Register TmpValue ...

Page 114: ...5 25 Compact Board PCM CFS Appendix B Appendix B I O Information ...

Page 115: ...Appendix B I O Information 101 5 25 Compact Board PCM CFS B 1 I O Address Map ...

Page 116: ...Appendix B I O Information 102 5 25 Compact Board PCM CFS ...

Page 117: ...Appendix B I O Information 103 5 25 Compact Board PCM CFS B 2 Memory Address Map ...

Page 118: ...Appendix B I O Information 104 5 25 Compact Board PCM CFS B 3 IRQ Mapping Chart ...

Page 119: ...Appendix B I O Information 105 5 25 Compact Board PCM CFS ...

Page 120: ...Appendix B I O Information 106 5 25 Compact Board PCM CFS ...

Page 121: ...5 25 Compact Board PCM CFS Appendix C Appendix C Digital I O Ports ...

Page 122: ...onfiguration registers 13h Select UART4 device configuration registers 14h Select UART5 device configuration registers 15h Select UART6 device configuration registers Otherwise Reserved GPIO7x Output Enable Register Index 80h Bit Name R W Reset Default Description 7 GPIO77_OE R W 3VCC 0 0 GPIO77 is in input mode 1 GPIO77 is in output mode 6 GPIO76_OE R W 3VCC 0 0 GPIO76 is in input mode 1 GPIO76 i...

Page 123: ... in output mode 1 GPIO73 outputs 1 when in output mode 2 GPIO72_VAL R W LRESET 1 0 GPIO72 outputs 0 when in output mode 1 GPIO72 outputs 1 when in output mode 1 GPIO71_VAL R W LRESET 1 0 GPIO71 outputs 0 when in output mode 1 GPIO71 outputs 1 when in output mode 0 GPIO70_VAL R W LRESET 1 0 GPIO70 outputs 0 when in output mode 1 GPIO70 outputs 1 when in output mode GPIO7 Pin Status Register Index 8...

Page 124: ...de GPIO8 Output Data Register Index 89h This byte could be also written by base address 2 Bit Name R W Reset Default Description 7 GPIO87_VAL R W LRESET 1 0 GPIO87 outputs 0 when in output mode 1 GPIO87 outputs 1 when in output mode 6 GPIO86_VAL R W LRESET 1 0 GPIO86 outputs 0 when in output mode 1 GPIO86 outputs 1 when in output mode 5 GPIO85_VAL R W LRESET 1 0 GPIO85 outputs 0 when in output mod...

Page 125: ...pin status of GPIO84 PD4 3 GPIO83_IN R The pin status of GPIO83 PD3 2 GPIO82_IN R The pin status of GPIO82 PD2 1 GPIO81_IN R The pin status of GPIO81 PD1 0 GPIO80_IN R The pin status of GPIO80 PD0 C 2 Digital I O Sample Code 4 in 4 out 2 low 2 high Outportb 0x2E 0x87 enter configuration Outportb 0x2E 0x87 Outportb 0x2E 0x07 set LDN Outportb 0x2F 0x06 Outportb 0x2E 0x88 GPIO set 8x Output enable re...

Page 126: ...5 25 Compact Board PCM CFS Appendix D Appendix D Mating Connectors and Cables ...

Page 127: ...dio Cable 1700140510 CN14 COM Port 1 Connector Molex 51110 1050 Serial Port 1701100206 CN15 COM Port 2 Connector Molex 51110 1050 Serial Port 1701100206 CN17 COM Port 3 Connector Molex 51110 1050 Serial Port 1701100206 CN18 COM Port 4 Connector Molex 51110 1050 Serial Port 1701100206 CN19 COM Port 5 Connector Molex 51110 1050 Serial Port 1701100206 CN20 COM Port 6 Connector Molex 51110 1050 Serial...

Page 128: ...HR 5 N A N A CN34 USB Port 5 6 Connector Molex 51110 1050 USB Cable 1709100201 CN35 USB Port 7 8 Connector Molex 51110 1050 USB Cable 1709100201 CN36 External RTC Connector Molex 51021 0200 Battery Cable 175011301C CN37 P S2 KB MS Connector Wafer B6B PHDSS P S2 KB MS Cable 1700060152 CN38 LVDS 1 Connector HIROSE DF13 30DS 1 25C N A N A CN39 LVDS 2 Connector HIROSE DF13 30DS 1 25C N A N A CN40 5Vou...

Page 129: ... Compact Board PCM CFS Connector Label Function Mating Connector Available Cable Cable P N Vendor Model no CN45 System Fan Connector Molex 22 01 2035 N A N A CN46 DIO 1 Connector Molex 51110 1050 N A N A CN50 DIO 2 Connector Molex 51110 1050 N A N A ...

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