Asus AAEON GENE-TGU6 User Manual Download

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Chapter 2

–

Hardware Information

3.5

” S

mp
act

ard

ENE

-T

2.3 List of Jumpers

Please refer to the table below for all of the board

’

s jumpers that you can configure for

your application

Label

Function

JP1

Front Panel Connector

JP2

Touch Screen 4/5/8-wire Mode Selection

JP3

Auto Power Button Enable/ Disable Selection

JP4

COM2 Pin 8 Function Selection

JP5

LVDS/eDP Port Backlight Inverter VCC Selection and Operating

VDD Selection

JP6

LVDS/eDP Port Backlight Lightness Control Mode Selection

JP7

Clear CMOS Jumper

2.3.1

Front Panel Connector (JP1)

Function

Pin 1

PWR_BTN-

Pin 2

Pin 3

HDD_LED-

Pin 4

Pin 5

SPEAKER-

Pin 6

Pin 7

PWR_LED-

Pin 8

Pin 9

H/W RESET-

Pin 10

H/W RESET+

Summary of Contents for AAEON GENE-TGU6

Page 1: ...Last Updated April 12 2022 GENE TGU6 3 5 Subcompact Board User s Manual 2nd Ed ...

Page 2: ...d in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to ass...

Page 3: ...istered trademark of Microsoft Corp Intel and Celeron are registered trademarks of Intel Corporation Intel Core are trademarks of Intel Corporation ITE is a trademark of Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties of their respective owners ...

Page 4: ...6 Packing List Before setting up your product please make sure the following items have been shipped Item Quantity GENE TGU6 MB 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...d descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...transient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device...

Page 7: ...usion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent re...

Page 9: ...质或元素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...henyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 s...

Page 11: ...n8 Function Selection JP4 13 2 3 5 LVDS eDP Backlight Inverter VCC LVDS VDD Selection JP5 13 2 3 6 LVDS eDP Port Backlight Lightness Control Mode Selection JP6 14 2 3 7 Clear CMOS Jumper JP7 14 2 4 List of Connectors 15 2 4 1 5V Output for SATA HDD CN1 16 2 4 2 SATA Port CN2 17 2 4 3 External Power Input CN3 17 2 4 4 Audio I O Port CN5 18 2 4 5 External 5VSB Input CN6 19 2 4 6 DDR SO DIMM Slot CN7...

Page 12: ... 4 21 LAN RJ 45 Dual Port i225 and i219 CN27 36 2 4 22 DP Connector CN28 37 2 4 23 DP HDMI Connector CN29 38 2 4 24 Battery Connector CN31 40 2 4 25 SPI BIOS Debug Port CN32 41 2 4 26 M 2 M Key 2280 Slot CN33 41 2 4 27 USB3 2 Gen 2 Ports 3 4 Dual Connector CN35 42 2 4 28 i219 LED Connector CN36 43 2 4 29 i225 LED Connector CN37 43 2 5 Thermal Solutions 44 2 5 1 GENE TGU6 FAN01 44 2 5 2 GENE TGU6 H...

Page 13: ...etup Submenu System I O 85 3 5 1 PCI Express Configuration 86 3 5 2 Storage Configuration 87 3 5 2 1 NVMe Configuration 88 3 5 3 HD Audio Subsystem Configuration Settings 89 3 5 4 Digital IO Port Configuration 90 3 5 5 Legacy Logical Devices Configuration 91 3 5 5 1 Serial Port 1 Configuration 92 3 5 5 2 Serial Port 2 Configuration 93 3 5 5 3 Serial Port 3 Configuration 94 3 5 5 4 Serial Port 4 Co...

Page 14: ... Priorities 107 3 8 Setup Submenu Save Exit 108 Chapter 4 Driver Installation 109 4 1 Driver Download Installation 110 Appendix A I O Information 113 A 1 I O Address Map 114 A 2 Memory Address Map 115 A 3 IRQ Mapping Chart 117 Appendix B Mating Connectors and Cables 119 B 1 Mating Connectors and Cables 120 ...

Page 15: ...3 5 Subcompact Board GENE TGU6 Chapter 1 Chapter 1 Product Specifications ...

Page 16: ... 50GHz up to 4 10GHz Core i3 1115G4E 2C 4T 2 20GHz up to 3 90GHz Celeron 6305E 2C 2T 1 80GHz CPU TDP 15W up to 28W Core i7 1185G7E Core i5 1145G7E Core i3 1115G4E 15W only Celeron 6305E Chipset Integrated with Intel SoC Memory Type DDR4 3200MHz Dual Channel SODIMM x 2 ECC Support IBECC select SKUs Max Memory Capacity 64GB BIOS UEFI Wake on LAN Yes Watchdog Timer 255 Level Security TPM2 0 Optional ...

Page 17: ...7 1185G7E DDR4 3200MHz 32GB x 2 Power Consumption Max 7 32A at 12V Intel i7 1185G7E DDR4 3200MHz 32GB x 2 Display Controller Intel Iris Xe Graphics Intel UHD Graphics LVDS eDP LVDS Dual Channel 18 24 bit x 1 Optional eDP1 4b Display Interface HDMI 2 0b x 1 DP1 4a x 2 Type C DP1 4 x 1 Multiple Display Support Up to 4 Simultaneous Displays Audio Codec Realtek ALC897 892 Audio Interface Line in Line ...

Page 18: ...DP1 4 x 1 Power Input Phoenix 2 pin Connector Other Internal I O USB USB2 0 x 2 Serial Port COM1 COM3 COM4 RS232 422 485 COM2 RS232 422 485 supports 5V 12V RI Video LVDS eDP x 1 Default LVDS eDP up to 1080P 60Hz SATA SATA III 6 0 Gbps x 1 5V SATA Power x 1 Audio Audio Header x 1 DIO GPIO 8 bit SMBus I2C SMBus I2C x 1 Default SMBus Touch 4 5 8 wire touch controller x 1 optional Fan Smart Fan x 1 SI...

Page 19: ... select with BIOS M 2 M Key 2280 x 1 PCIe x4 E Key 2230 x 1 PCIe USB2 0 BIO Other Mechanical Dimensions 5 75 x 4 146mm x 101 7mm Environmental Operating Temperature 32 F 140 F 0 C 60 C Storage Temperature 40 F 176 F 40 C 80 C Operating Humidity 0 90 relative humidity non condensing MTBF Hours 329 884 Certification EMC CE FCC Class A ...

Page 20: ...Chapter 1 Product Specifications 6 3 5 Subcompact Board GENE TGU6 1 2 Block Diagram ...

Page 21: ...3 5 Subcompact Board GENE TGU6 Chapter 2 Chapter 2 Hardware Information ...

Page 22: ...Chapter 2 Hardware Information 8 3 5 Subcompact Board GENE TGU6 2 1 Dimensions Note Advanced version Note Standard version ...

Page 23: ...Chapter 2 Hardware Information 9 3 5 Subcompact Board GENE TGU6 ...

Page 24: ...Chapter 2 Hardware Information 10 3 5 Subcompact Board GENE TGU6 2 2 Jumpers and Connectors Top View Front I O View Thermal Source 1 Thermal Source 1 ...

Page 25: ...Chapter 2 Hardware Information 11 3 5 Subcompact Board GENE TGU6 Bottom View Thermal Source 2 Front I O ...

Page 26: ...ction JP3 Auto Power Button Enable Disable Selection JP4 COM2 Pin 8 Function Selection JP5 LVDS eDP Port Backlight Inverter VCC Selection and Operating VDD Selection JP6 LVDS eDP Port Backlight Lightness Control Mode Selection JP7 Clear CMOS Jumper 2 3 1 Front Panel Connector JP1 Pin Function Pin Function Pin 1 PWR_BTN Pin 2 PWR_BTN Pin 3 HDD_LED Pin 4 HDD_LED Pin 5 SPEAKER Pin 6 SPEAKER Pin 7 PWR...

Page 27: ...n LVDS VDD Selection 12V 5V Default 3 3V Default 5V Note JP5 Default is two 2 jumpers placed on pins 3 5 and pins 2 4 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 3 5 1 2 3 4 5 6 ...

Page 28: ...re Information 14 3 5 Subcompact Board GENE TGU6 2 3 6 LVDS eDP Port Backlight Lightness Control Mode Selection JP6 VR Mode PWM Mode Default 2 3 7 Clear CMOS Jumper JP7 Normal Default Clear CMOS 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 29: ...Port 3 Port 4 RS232 422 485 Dual Port Header CN10 Mini Card Slot Full Size CN11 DDR4 SO DIMM Slot CN12 M 2 E Key 2230 CN13 COM Port 1 Port 2 RS232 422 485 Dual Port Header CN15 Touch Screen Connector Optional CN16 eSPI Debug Port CN17 Digital I O Port CN18 LVDS eDP Port CN19 Nano SIM Card Socket CN21 USB2 0 Port 5 Port 6 Dual Port Header CN22 LVDS eDP Port Inverter Backlight Connector CN23 CPU Fan...

Page 30: ... Only CN31 Battery Connector CN32 SPI BIOS Debug Port CN33 M 2 M Key 2280 CN35 USB3 2 Gen 2 Port 3 Port 4 Dual Port Connector CN36 i219 LED Connector CN37 i225 LED Connector 2 4 1 5V Output for SATA HDD CN1 Pin Pin Name Signal Type Signal Level 1 5V PWR 5V at 1A 2 GND GND Note Max current for Pin 1 is 1 Amp 5V GND ...

Page 31: ...l Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND 2 4 3 External Power Input CN3 Pin Pin Name Signal Type Signal Level 1 12V PWR 9 36V or 12V at 8A 2 GND GND Note There are two types of power input 9 36V or 12V by BOM option Pin 1 Pin 7 12V GND ...

Page 32: ...8 3 5 Subcompact Board GENE TGU6 2 4 4 Audio I O Port CN5 Pin Pin Name Signal Type 1 LOUT_R OUT 2 MIC_R IN 3 LOUT_L OUT 4 MIC_L IN 5 JD_LOUT IN 6 JD_MIC IN 7 AUD_GND GND 8 AUD_GND GND 9 JD_LIN IN 10 LIN_R IN 11 VDD_AUD PWR 12 LIN_L IN ...

Page 33: ...mation 19 3 5 Subcompact Board GENE TGU6 2 4 5 External 5VSB Input CN6 Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 5V 2 GND GND 3 5VSB PWR 5V at 2A 2 4 6 DDR SO DIMM Slot CN7 Standard Specifications 5VSB GND PS_ON 1 2 3 ...

Page 34: ...ubcompact Board GENE TGU6 2 4 7 COM Port 3 Port 4 Dual Header CN8 RS 232 Pin Pin Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 5V 7 8 DTR OUT 5V 9 10 GND GND 11 12 DSR IN 13 14 RTS OUT 5V 15 16 CTS IN 17 18 RI IN 19 20 NC ...

Page 35: ... Signal Level 1 2 RS485_D I O 5V 3 4 RS485_D I O 5V 5 6 NC 7 8 NC 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 NC 19 20 NC RS 422 Pin Pin Pin Name Signal Type Signal Level 1 2 RS422_TX OUT 5V 3 4 RS422_TX OUT 5V 5 6 RS422_RX IN 7 8 RS422_RX IN 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 NC 19 20 NC ...

Page 36: ...el 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V ...

Page 37: ...X DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND ...

Page 38: ...evel 51 NC 52 3 3VSB PWR 3 3V 2 4 9 DDR SO DIMM Slot CN11 Standard Specifications 2 4 10 M 2 E Key 2230 CN12 Standard Specifications 2 4 11 COM Port 1 Port 2 Dual Header CN13 RS 232 Pin Pin Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 5V 7 8 DTR OUT 5V 9 10 GND GND 11 12 DSR IN ...

Page 39: ...V 12V IN 19 20 NC Note RI 5V 12V for COM2 only RS 485 Pin Pin Pin Name Signal Type Signal Level 1 2 RS485_D I O 5V 3 4 RS485_D I O 5V 5 6 NC 7 8 NC 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 NC 19 20 NC RS 422 Pin Pin Pin Name Signal Type Signal Level 1 2 RS422_TX OUT 5V 3 4 RS422_TX OUT 5V 5 6 RS422_RX IN 7 8 RS422_RX IN 9 10 GND GND 11 12 NC ...

Page 40: ...can be set by BIOS setting Default is RS 232 Note 2 Pin 8 function can be set by JP4 See Ch 2 3 4 2 4 12 Touchscreen Connector Optional CN15 Note Touch mode can be set by BIOS 8 Wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN ...

Page 41: ...Chapter 2 Hardware Information 27 3 5 Subcompact Board GENE TGU6 4 Wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC ...

Page 42: ...dware Information 28 3 5 Subcompact Board GENE TGU6 5 Wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 UL Y IN 3 UR H IN 4 LL L IN 5 LR X IN 6 SENSE S IN 7 NC 8 NC 9 NC Note Touch Mode can be set by BIOS ...

Page 43: ...4 13 eSPI Debug Port CN16 Pin Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 SMB_DATA I2C_SDA I O 11 SMB_CLK I2C_CLK OUT 12 SMB_ALERT SERIRQ IN 3 3V ...

Page 44: ...Description Pin Signal Description 1 PD0 2 PD1 3 PD2 4 PD3 5 PD4 6 PD5 7 PD6 8 PD7 9 V5S 0 5A 10 GND 2 4 15 LVDS eDP Port CN18 Note LVDS LCD_PWR can be set to 3 3V or 5V by JP5 See Ch 2 3 5 Note LVDS LCD_PWR supports current of 2A DIO1 DIO3 DIO5 DIO7 GND DIO0 1 2 9 10 DIO2 DIO4 DIO6 5V PIN 1 PIN 2 PIN 30 PIN 29 ...

Page 45: ...LCD_PWR LCD_PWR PWR 3 3V 5V 8 GND GND GND 9 LVDS_DA0 eDP_TXN2 DIFF 10 LVDS_DA0 eDP_TXP2 DIFF 11 LVDS_DA1 eDP_TXN1 DIFF 12 LVDS_DA1 eDP_TXP1 DIFF 13 LVDS_DA2 eDP_TXN0 DIFF 14 LVDS_DA2 eDP_TXP0 DIFF 15 LVDS_DA3 NC DIFF 16 LVDS_DA3 eDP_HPD DIFF 17 DDC_DATA eDP_AUX_N I O 3 3V 18 DDC_CLK eDP_AUX_P I O 3 3V 19 LVDS_DB0 NC DIFF 20 LVDS_DB0 NC DIFF 21 LVDS_DB1 NC DIFF 22 LVDS_DB1 NC DIFF 23 LVDS_DB2 NC DI...

Page 46: ...DP Signal Type Signal Level 27 LCD_PWR LCD_PWR PWR 3 3V 5V 28 GND GND GND 29 LVDS_B_CLK NC DIFF 30 LVDS_B_CLK NC DIFF 2 4 16 Nano SIM Card Socket CN19 Pin Pin Name Signal Type Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 NC 5 GND GND 6 UIM_VPP PWR 7 UIM_DATA I O 8 NC ...

Page 47: ...formation 33 3 5 Subcompact Board GENE TGU6 2 4 17 USB 2 0 Port 5 Port 6 Dual Header CN21 USB Port 5 USB Port 6 Pin Pin Name Pin Pin Name 1 5VSB 0 5A 2 5VSB 0 5A 3 USB5_D 4 USB6_D 5 USB5_D 6 USB6_D 7 GND 8 GND 9 GND 10 GND ...

Page 48: ...tor CN22 Pin Pin Name Signal Type Signal level 1 BKL_PWR PWR 5V 12V 2 BKL_PWR PWR 5V 12V 3 BKL_CONTROL OUT 4 GND GND 5 GND GND 6 BKL_ENABLE OUT 3 3V Note 1 LVDS BKL_PWR can be set to 5V or 12V by JP5 See Ch 2 3 5 Note 2 LVDS BKL_PWR supports current of 1 5A Note 3 LVDS BKL_CONTROL can be set by JP6 See Ch 2 3 6 ...

Page 49: ...N23 Pin Pin Name Signal Type Signal Level 1 GND GND 2 FAN_POWER PWR 12V at 1A 3 FAN_TAC IN 4 FAN_CTL 2 4 20 USB 3 2 Gen 2 Ports 1 2 Dual Connector CN26 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V at 0 9A 2 USB0_D DIFF 3 USB0_D DIFF 4 GND GND 5 USB0_SSRX DIFF 6 USB0_SSRX DIFF ...

Page 50: ...9A 11 USB1_D DIFF 12 USB1_D DIFF 13 GND GND 14 USB1_SSRX DIFF 15 USB1_SSRX DIFF 16 GND GND 17 USB1_SSTX DIFF 18 USB1_SSTX DIFF 2 4 21 LAN RJ 45 Dual Port i225 and i219 CN27 i225 i219 Pin Pin Name Pin Pin Name 1P1 LAN2_MDI0_P 2P1 LAN1_MDI0_P 1P2 LAN2_MDI0_N 2P2 LAN1_MDI0_N 1P3 LAN2_MDI1_P 2P3 LAN1_MDI1_P 1P4 LAN2_MDI1_N 2P4 LAN1_MDI1_N 1P7 LAN2_MDI2_P 2P7 LAN1_MDI2_P ...

Page 51: ...2_N 1P9 LAN2_MDI3_P 2P9 LAN1_MDI3_P 1P10 LAN2_MDI3_N 2P10 LAN1_MDI3_N 2 4 22 DP Connector CN28 Pin Pin Name Signal Type Signal Level 1 DP1_TX0_DP DIFF 2 GND GND 3 DP1_TX0_DN DIFF 4 DP1_TX1_DP DIFF 5 GND GND 6 DP1_TX1_DN DIFF 7 DP1_TX2_DP DIFF 8 GND GND 9 DP1_TX2_DN DIFF 10 DP1_TX3_DP DIFF 11 GND GND 12 DP1_TX3_DN DIFF 13 GND GND ...

Page 52: ...al Level 14 GND GND 15 DP1_AUX_DP I O 16 GND GND 17 DP1_AUX_DN I O 18 DP1_HPD I O 19 GND GND 20 V3P3S PWR 3 3V 2 4 23 DP HDMI Connector CN29 Pin Pin Name Signal Type Signal Level DP Port 1 DP2_TX0_DP DIFF 2 GND GND 3 DP2_TX0_DN DIFF 4 DP2_TX1_DP DIFF 5 GND GND 6 DP2_TX1_DN DIFF 7 DP2_TX2_DP DIFF ...

Page 53: ...3_DP DIFF 11 GND GND 12 DP2_TX3_DN DIFF 13 GND GND 14 GND GND 15 DP2_AUX_DP I O 16 GND GND 17 DP2_AUX_DN I O 18 DP2_HPD I O 19 GND GND 20 V3P3S PWR 3 3V HDMI Port 21 HDMI_TX2 DIFF 22 GND GND 23 HDMI_TX2 DIFF 24 HDMI_TX1 DIFF 25 GND GND 26 HDMI_TX1 DIFF 27 HDMI_TX0 DIFF 28 GND GND 29 HDMI_TX0 DIFF 30 HDMI_CLK DIFF 31 GND GND 32 HDMI_CLK DIFF ...

Page 54: ...bcompact Board GENE TGU6 Pin Pin Name Signal Type Signal Level 33 NC 34 NC 35 DDC_CLK I O 5V 36 DDC_DATA I O 5V 37 GND GND 38 5V PWR 5V 39 HDMI_HPD 2 4 24 Battery Connector CN31 Pin Pin Name Signal Type Signal Level 1 3 3V PWR 3 3V 2 GND GND ...

Page 55: ...U6 2 4 25 SPI BIOS Debug Port CN32 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC 2 4 26 M 2 M Key 2280 Slot CN33 Standard specifications P IN 1 P IN 2 P IN 3 P IN 4 P IN 5 P IN 6 P IN 7 ...

Page 56: ... Pin Name Signal Type Signal Level 1 5VSB PWR 5V at 0 9A 2 USB2_D DIFF 3 USB2_D DIFF 4 GND GND 5 USB2_SSRX DIFF 6 USB2_SSRX DIFF 7 GND GND 8 USB2_SSTX DIFF 9 USB2_SSTX DIFF 10 5VSB PWR 5V at 0 9A 11 USB3_D DIFF 12 USB3_D DIFF 13 GND GND 14 USB3_SSRX DIFF 15 USB3_SSRX DIFF 16 GND GND 17 USB3_SSTX DIFF 18 USB3_SSTX DIFF ...

Page 57: ...ctor CN36 Pin Pin Name Signal Type Signal Level 1 LINK_ACT IO 2 V3P3A PWR 3 3V 3 LAN_1000 IO 4 LAN_100 IO 5 LAN_100 IO 6 LAN_1000 IO 2 4 29 i225 LED Connector CN37 Pin Pin Name Signal Type Signal Level 1 LINK_ACT IO 2 V3P3A PWR 3 3V 3 LAN_2500 IO 4 LAN_1000 IO 5 LAN_1000 IO 6 LAN_2500 IO ...

Page 58: ...Chapter 2 Hardware Information 44 3 5 Subcompact Board GENE TGU6 2 5 Thermal Solutions 2 5 1 GENE TGU6 FAN01 Single piece cooler does not require use of heat spreader ...

Page 59: ...Chapter 2 Hardware Information 45 3 5 Subcompact Board GENE TGU6 GENE TGU6 FAN01 Assembly ...

Page 60: ...Chapter 2 Hardware Information 46 3 5 Subcompact Board GENE TGU6 2 5 2 GENE TGU6 HSK01 Single piece heat sink does not require use of heat spreader ...

Page 61: ...Chapter 2 Hardware Information 47 3 5 Subcompact Board GENE TGU6 GENE TGU6 HSK01 Assembly ...

Page 62: ...Chapter 2 Hardware Information 48 3 5 Subcompact Board GENE TGU6 2 5 3 GENE TGU6 HSP01 ...

Page 63: ...Chapter 2 Hardware Information 49 3 5 Subcompact Board GENE TGU6 GENE TGU6 HSP01 Assembly ...

Page 64: ...3 5 Subcompact Board GENE TGU6 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 65: ...ration against the values stored in the CMOS memory and BIOS NVRAM If a system configuration is not found or an error is detected the module will load the default configuration and reboot automatically There are four situations in which you will need to setup system configuration 1 You are starting your system for the first time 2 You have changed the hardware attached to your system 3 The system ...

Page 66: ... BIOS Setup press Del or ESC immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Access advanced hardware settings and Hardware Monitor System I O Configure I O settings including PCI Express and storage options Security Set admin and user passwords access secure boot...

Page 67: ...Chapter 3 AMI BIOS Setup 53 3 5 Subcompact Board GENE TGU6 3 3 Setup Submenu Main ...

Page 68: ...n feature the user acknowledges the security risks Enabling Error Injection allows attackers who have access to the Host Operating System to inject IBECC errors that can cause unintended memory corruption and enable the leak of security data in the BIOS stolen memory regions In Band ECC Operation Mode 0 1 2 Optimal Default Failsafe Default 0 Functional Mode protects requests based on the address r...

Page 69: ...up 55 3 5 Subcompact Board GENE TGU6 Options Summary IBECC Protect Region 0 7 Disabled Optimal Default Failsafe Default Enabled Enable Disabled In Band ECC for Region 0 7 Note In Band ECC Support availability depends on CPU ...

Page 70: ...Chapter 3 AMI BIOS Setup 56 3 5 Subcompact Board GENE TGU6 3 4 1 Graphics Configuration ...

Page 71: ... eDP Disabled Optimal Default Failsafe Default Enabled Enable Disabled this panel LVDS Panel Type 640X480 60HZ 800X480 60HZ 800X600 60HZ 1024X600 60HZ 1024X768 60HZ Optimal Default Failsafe Default 1280X768 60HZ 1280X800 60HZ 1280X1024 60HZ 1366X768 60HZ 1440X900 60HZ 1600X1200 60HZ 1920X1080 60HZ 1920X1200 60HZ ...

Page 72: ...imal Default Failsafe Default Select backlight control signal type Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz Optimal Default Failsafe Default 500Hz 1 1KHz 2 2KHz 6 5KHz Select PWM frequency o...

Page 73: ...BIOS Setup 59 3 5 Subcompact Board GENE TGU6 Options Summary Swing Level 450mV Select Swing Level Center Spreading Depth no spreading Optimal Default Failsafe Default 0 5 1 0 1 5 2 0 2 5 Select Center Spreading Depth ...

Page 74: ... Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Turbo Mode Disabled Enabled Optimal Default Failsafe Default Enable Disable processor Turbo Mode requires EMTTM enabled too AUTO means enabled ...

Page 75: ...Chapter 3 AMI BIOS Setup 61 3 5 Subcompact Board GENE TGU6 3 4 3 Memory Configuration ...

Page 76: ...Chapter 3 AMI BIOS Setup 62 3 5 Subcompact Board GENE TGU6 3 4 4 Hardware Monitor Options Summary Smart Fan Disabled Enabled Optimal Default Failsafe Default Enable or Disable Smart Fan ...

Page 77: ...ode push pull to control 4 wire fans nLinear fan application circuit to control 3 wire fan speed by fan s power terminal nOutput PWM mode open drain to control Intel 4 wire fans Fan 1 Smart Fan Control Manual Duty Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU Optimal Default Failsafe Default System Temperature 2 System Temperature Select th...

Page 78: ...y Cycle Auto fan speed control Fan speed will follow different temperature by different duty cycle 1 100 Temperature Manual Duty Mode Options Summary Manual Duty Mode 60 Optimal Default Failsafe Default Manual mode fan control user can write expected duty cycle PWM fan type 1 100 ...

Page 79: ...Chapter 3 AMI BIOS Setup 65 3 5 Subcompact Board GENE TGU6 3 4 5 PCH FW Configuration ...

Page 80: ... 5 1 Firmware Update Configuration Options Summary Me FW Image Re Flash Disabled Optimal Default Failsafe Default Enabled Enable Disable Me FW Image Re Flash function FW Update Disabled Enabled Optimal Default Failsafe Default Enable Disable ME FW Update function ...

Page 81: ... Power Loss Last State Optimal Default Failsafe Default Always On Always Off IO Restore AC power Loss RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time Dynamic Time Bypass Fixed Time System will wake on the hr min sec specified n Dynamic Time System will wake on the current time Increase minute s n Bypass BIOS will not control RTC wake function during system shutdown ...

Page 82: ... second 30 Optimal Default Failsafe Default Timer count set to Watch Dog Timer for POST WARNING Do not set to a value equal to or shorter than normal POST time otherwise system may never complete POST unless clearing BIOS settings More than twice the normal POST time is suggested Sends watch dog before booting OS Disabled Optimal Default Failsafe Default Enabled Enabled Robot set Watch Dog Timer W...

Page 83: ...hold BIOS from POST Delayed POST DXE phase Disabled Optimal Default Failsafe Default Enabled Enabled Robot holds BIOS before POST completion This allows BIOS POST to start with stable power or start after system is physically warmed up Note Robot does this after Sends watch dog before BIOS POST Delayed time second 10 Optimal Default Failsafe Default Period of time for Robot to hold BIOS from POST ...

Page 84: ...Hard Select reset type robot should send on each boot Retry Count 3 Optimal Default Failsafe Default Fill retry counter here Robot will reset system at most counter times and then let system continue its POST At time After show logo Optimal Default Failsafe Default Before show logo Select robot action time After show logo Robot will do action after logo is displayed System devices are almost ready...

Page 85: ...mal Default Failsafe Default Fill hold time out here Robot will hold system no longer then time out value and then let system continue its POST At time After show logo Optimal Default Failsafe Default Before show logo Select robot action time After show logo Robot will do actoin after logo is displayed System devices are almost ready Before show logo Robot will do action earlier before logo but so...

Page 86: ...Board GENE TGU6 3 4 7 1 1 Device Detecting Configuration Interface Disabled Options Summary Interface Disabled Optimal Default Failsafe Default PCI DIO SMBUS Legacy I O Super I O MMIO Select interface robot should use to communicate with device ...

Page 87: ...lt Failsafe Default Fill FUNCTION number to a PCI device in hexadecimal Range 0 FF Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read registe...

Page 88: ...Register offset 0 Optimal Default Failsafe Default Fill register offset or index for robot to read in hexadecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Def...

Page 89: ...ition met DIO pin number DIO1 Optimal Default Failsafe Default DIO Fill DIO pin number 0 DIO0 1 DIO1 and so on For COM express product 0 3 GPI0 3 4 7 GPO0 3 Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In High Low level Low Optimal Default Failsafe Default High Select High Low level of the DIO pin that robot should do action ...

Page 90: ...In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register data is bitwise equal to Optimal Default Failsafe Default bytewise equal t...

Page 91: ...decimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal Range 0 FF ...

Page 92: ...dition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register data is bitwise equal to Optimal Default Failsafe Default bytewise equal to byte...

Page 93: ...lt Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal Range 0 FF ...

Page 94: ...tion Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register data is bitwise equal to Optimal Default Failsafe Default bytewise equal to bytewi...

Page 95: ...decimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal Range 0 FF ...

Page 96: ...In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register data is bitwise equal to Optimal Default Failsafe Default bytewise equal t...

Page 97: ...lt Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal Range 0 FF ...

Page 98: ...SN PCS Disabled Optimal Default Failsafe Default Enabled Enable Disable TSN PCS When enabled TSN PCS device will appear in ACPI table PCH TSN Multi Vc Disabled Optimal Default Failsafe Default Enabled Enable Disable PCH TSN Multi Virtual Channels PCH TSN Port 1 Link Speed RefClk 24Mhz 2 5Gbps RefClk 24Mhz 1Gbps Optimal Default Failsafe Default RefClk 38 4Mhz 2 5Gbps RefClk 38 4Mhz 1Gbps PCH TSN Li...

Page 99: ...Chapter 3 AMI BIOS Setup 85 3 5 Subcompact Board GENE TGU6 3 5 Setup Submenu System I O ...

Page 100: ...3 5 1 PCI Express Configuration Options Summary PCI Express Root Port 5 CN12 Port11 Enabled Optimal Default Failsafe Default Disabled Control the PCI Express Root Port PCIe Speed Auto Optimal Default Failsafe Default Gen1 Gen2 Gen3 Control the PCI Express Speed ...

Page 101: ...ions Summary SATA Controller s Disabled Enabled Optimal Default Failsafe Default Enable Disable SATA Device Port 0 1 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable ...

Page 102: ...Chapter 3 AMI BIOS Setup 88 3 5 Subcompact Board GENE TGU6 3 5 2 1 NVMe Configuration ...

Page 103: ...GU6 3 5 3 HD Audio Subsystem Configuration Settings Options Summary HD Audio Disabled Enabled Optimal Default Failsafe Default Control Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled ...

Page 104: ...0 3 5 Subcompact Board GENE TGU6 3 5 4 Digital IO Port Configuration Options Summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output level when DIO pin is output ...

Page 105: ...Chapter 3 AMI BIOS Setup 91 3 5 Subcompact Board GENE TGU6 3 5 5 Legacy Logical Devices Configuration ...

Page 106: ...lt Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 107: ...lt Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 108: ...t Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3E8h IRQ 11 IO 2E8h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 109: ...t Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2E8h IRQ 11 IO 3E8h IRQ 11 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 110: ...Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable Console Redirection EMS Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable ...

Page 111: ...har set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc VT UTF8 Uses UTF8 encoding to map Unicode chars onto 1 or more bytes Bits Per second 9600 19200 38400 57600 115200 Optimal Default Failsafe Default Selects serial port transmission speed The speed must be matched on the other side Long or noisy lines may require lower speeds Data Bits 7 8 Optimal Default Failsafe D...

Page 112: ...ire more than 1 stop bit Flow Control None Optimal Default Failsafe Default Hardware RTS CTS Flow control can prevent data loss from buffer overflow When sending data if the receiving buffers are full a stop signal can be sent to stop the data flow Once the buffers are empty a start signal can be sent to re start the flow Hardware flow control uses two wires to send start stop signals VT UTF8 Comb...

Page 113: ...MI BIOS Setup 99 3 5 Subcompact Board GENE TGU6 3 5 7 PCH IO Configuration Options Summary MiniCard Slot Function SATA Optimal Default Failsafe Default PCIe Select function enabled for Full size MiniCard Slot CN10 ...

Page 114: ...hen the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to rem...

Page 115: ...ce TCG EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA256 PCR Bank Pending Operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Your Computer will reboot d...

Page 116: ...ent Hierarchy Disabled Enabled Optimal Default Failsafe Default Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Optimal Default Failsafe Default Select the TCG2 Spec Version Support TCG_1_2 the Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 2 1 3 Optimal Default Failsafe Default Sele...

Page 117: ...tem is in User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup...

Page 118: ...ser mode The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device Enroll Efi Image Allow the image to run in Secure Boot mode Enr...

Page 119: ... Delete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append OsRecovery Signatures Update Append Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI...

Page 120: ...rd GENE TGU6 3 7 Setup Submenu Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enables or disables showing boot logo Network Stack Disabled Optimal Default Failsafe Default Enabled Enable Disable UEFI Network Stack ...

Page 121: ...Chapter 3 AMI BIOS Setup 107 3 5 Subcompact Board GENE TGU6 3 7 1 BBS Priorities ...

Page 122: ...Chapter 3 AMI BIOS Setup 108 3 5 Subcompact Board GENE TGU6 3 8 Setup Submenu Save Exit ...

Page 123: ...3 5 Subcompact Board GENE TGU6 Chapter 4 Chapter 4 Driver Installation ...

Page 124: ...der where you unzipped the Audio Drivers 2 Run the Setup exe in the folder 3 Follow the instructions 4 Drivers will be installed automatically Chipset Driver Windows 10 1 Open the folder where you unzipped the Chipset Drivers 2 Run the SetupChipset exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Graphics Driver Windows 10 1 Open the folder where you unzip...

Page 125: ...lly 6 After installing the LAN driver install Intel PROSet package optional 7 Open the Wired_PROSet_26 3_x64 folder 8 Run the Wired_PROSet_26 3_x64 exe file in the folder 9 Follow the instructions 10 Drivers will be installed automatically ME TXE Drivers Windows 10 1 Open the folder where you unzipped the ME TXE Drivers 2 Run the SetupME exe file in the folder 3 Follow the instructions 4 Drivers w...

Page 126: ... Setup exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Peripheral Driver Linux 1 Open the folder where you unzipped the Peripheral Drivers 2 Follow the instructions contained within the user guides Touch Drivers Linux 1 Touch Drivers can be installed via terminal or through the graphical UI if you have one installed ...

Page 127: ...3 5 Subcompact Board GENE TGU6 Appendix A Appendix A I O Information ...

Page 128: ...Appendix A I O Information 114 3 5 Subcompact Board GENE TGU6 A 1 I O Address Map ...

Page 129: ...Appendix A I O Information 115 3 5 Subcompact Board GENE TGU6 A 2 Memory Address Map ...

Page 130: ...Appendix A I O Information 116 3 5 Subcompact Board GENE TGU6 ...

Page 131: ...Appendix A I O Information 117 3 5 Subcompact Board GENE TGU6 A 3 IRQ Mapping Chart ...

Page 132: ...Appendix A I O Information 118 3 5 Subcompact Board GENE TGU6 ...

Page 133: ...3 5 Subcompact Board GENE TGU6 Appendix B Appendix B Mating Connectors and Cables ...

Page 134: ...TA Connector Molex 887505318 SATA Cable 1709070460 CN3 9 36V Vin Connector N A N A Power Cable 170204010R CN5 Audio Connector ACES 50247 012H0 H0 001 Audio Cable 170X000156 CN6 External 5VSB Power Input and PS_ON JST PHR 3 ATX Cable 170220020B CN8 COM Port 3 4 Connector ACES 50247 020H0 H0 001 Serial Port Cable 170X000231 CN13 COM Port 1 2 Connector ACES 50247 020H0 H0 001 Serial Port Cable 170X00...

Page 135: ... Digital I O Connector Neltron 2026B 10 N A N A CN18 LVDS Connector HIROSE DF13 30DS 1 25C N A N A CN21 USB Port Connector Aces 50238 01041 003 USB Wafer Cable 170010010D CN22 LVDS Inverter Connector Aces 50228 00671 001 Inverter cable 170X000152 CN23 CPU Fan Connector Molex 22 01 2035 N A N A CN31 External RTC Connector Molex 51021 0200 Battery Cable 175011901C ...

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