Asus AAEON GENE-KBU6 User Manual Download Page 24

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Chapter 2

–

Hardware Information

3.5

” S

ard

E-

2.3 List of Jumpers

Please refer to the table below for all of the board

’

s jumpers that you can configure for

your application

Label

Function

JP1

Clear CMOS Jumper

JP2

LVDS Port Backlight Inverter VCC Selection

JP3

LVDS Port Backlight Lightness Control Mode Selection

JP4

LVDS Port Operating VDD Selection

JP5

mSATA/Mini-Card Operating VCC Selection

JP6

Touch Screen 4/5/8-wire Mode Selection

JP7

Auto Power Button Enable/Disable Selection

JP8

COM3 Pin8 Function Selection

JP9

COM2 Pin8 Function Selection

JP10

Front Panel Connector

JP11

COM4 Pin8 Function Selection

2.3.1

Clear CMOS Jumper (JP1)

Normal (Default)

Clear CMOS

2.3.2 LVDS Port Backlight Inverter VCC Selection (JP2)

+12V

+5V (Default)

1 2 3

Summary of Contents for AAEON GENE-KBU6

Page 1: ...Last Updated October 28 2021 GENE KBU6 3 5 Subcompact Board User s Manual 1st Ed ...

Page 2: ...d in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to ass...

Page 3: ...istered trademark of Microsoft Corp Intel and Celeron are registered trademarks of Intel Corporation Intel Core is a trademark of Intel Corporation ITE is a trademarkof Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties oftheir respective owners ...

Page 4: ...g List Before setting up your product please make sure the following items have been shipped Item Quantity GENE KBU6 MB 1 Heat Spreader 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...d descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...transient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device...

Page 7: ...usion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent re...

Page 9: ...质或元素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...henyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 s...

Page 11: ...LVDS Port Operating VDD Selection JP4 11 2 3 5 mSATA Mini Card Operating VCC Selection JP5 11 2 3 6 Touch Screen 4 5 8 Wire Selection JP6 11 2 3 7 Auto Power Button Enable Disable Selection JP7 11 2 3 8 COM3 Pin8 Function Selection JP8 12 2 3 9 COM2 Pin8 Function Selection JP9 12 2 3 10 Front Panel Connector JP10 12 2 3 11 COM4 Pin8 Function Selection JP11 13 2 4 List of Connectors 14 2 4 1 Batter...

Page 12: ...20 31 2 4 17 USB 2 0 Port CN21 31 2 4 18 Audio I O Port CN22 32 2 4 19 Touchscreen Connector CN23 33 2 4 20 Digital I O Port CN24 36 2 4 21 COM Port 1 CN25 37 2 4 22 COM Port 4 CN26 38 2 4 23 COM Port 2 CN27 41 2 4 24 COM Port 3 CN28 44 2 4 25 LPC Port CN29 47 2 4 26 External Power Input CN30 48 2 4 27 5VSB Output w SMBus CN32 48 2 4 28 External 5VSB Input CN33 49 2 4 29 BIO Connector CN35 49 2 4 ...

Page 13: ...tion 73 3 4 5 2 Serial Port 2 Configuration 74 3 4 5 3 Serial Port 3 Configuration 75 3 4 5 4 Serial Port 4 Configuration 76 3 4 6 USB Configuration 77 3 4 7 Digital IO Port Configuration 78 3 4 8 Power Management 79 3 4 9 Compatibility Support Module Configuration 81 3 5 Setup Submenu Chipset 82 3 5 1 System Agent SA Configuration 83 3 5 1 1 Graphics Configuration 84 3 5 2 PCH IO Configuration 87...

Page 14: ... 1 I O Address Map 104 B 2 Memory Address Map 106 B 3 IRQ Mapping Chart 107 Appendix C Electrical Specifications for I O Ports 118 C 1 Electrical Specifications for I O Ports 119 Appendix D Digital I O Ports 120 D 1 Electrical Specifications for Digital I O Ports 121 D 2 DI O Programming 122 D 3 Digital I O Register 123 D 4 Digital I O Sample Program 124 Appendix E Mating Connectors and Cables 127...

Page 15: ...3 5 Subcompact Board GENE KBU6 Chapter 1 Chapter 1 Product Specifications ...

Page 16: ...GHz Celeron 3965U 2C 2T 2 20 GHz CPU TDP Core i7 7600U 15W up to 25W Core i5 7300U 15W up to 25W Core i3 7100U 15W Celeron 3965U 15W Chipset Integrated with Intel SoC Memory Type DDR4 up to 2133MHz SODIMM x 1 up to 16GB Non ECC BIOS UEFI Wake on LAN Y es Watchdog Timer 255 Levels Security TPM 2 0 Optional RTC Battery Lithium Battery3V 240 mAh Dimensions L x W 5 75 x 4 146mm x 101 7mm Power Power R...

Page 17: ...32GB Display Controller Intel HD Graphics 510 620 LVDS eDP LVDS Dual Channel 18 24 bit x 1 Display Interface DP1 2 x 1 DVI D x 1 default Optional DVI I x 1 with VGA signal Multiple Display Support Up to 3 Simultaneous Displays Audio Codec Realtek ALC897 892 Audio Interface Line in Line out Mic Speaker External I O Ethernet Intel i210 i211 10 100 1000 Base TX RJ 45 x 2 USB USB3 2 Gen 1 x 4 Serial P...

Page 18: ...o Header x 1 DIO GPIO 8 bit SMBus I2C SMBus x 1 Touch 4 5 8 wire Touch Controller x 1 optional Fan DC Fan x 1 optional Smart Fan SIM Micro SIM x 1 optional Front Panel HDD LED Power LED Power Button Buzzer Reset Button Others Expansion Mini PCIe mSATA Full Size mPCIe x 1 Half Size mSATA mPCIe x 1 Default mSATA select by BIOS M 2 BIO BIO x 1 Environment Operating Temperature 32 F 140 F 0 C 60 C Sto...

Page 19: ...hapter 1 Product Specifications 5 3 5 Subcompact Board GENE KBU6 Environment Operating Humidity 0 90 relative humidity non condensing MTBF Hours 375 577 EMC Certification CE FCC Class A 1 2 Block Diagram ...

Page 20: ...3 5 Subcompact Board GENE KBU6 Chapter 2 Chapter 2 Hardware Information ...

Page 21: ...Chapter 2 Hardware Information 7 3 5 Subcompact Board GENE KBU6 2 1 Dimensions Component Side Component Side ...

Page 22: ...Chapter 2 Hardware Information 8 3 5 Subcompact Board GENE KBU6 Solder Side with heat spreader Solder Side ...

Page 23: ...Chapter 2 Hardware Information 9 3 5 Subcompact Board GENE KBU6 2 2 Jumpers and Connectors Component Side ...

Page 24: ...rt Backlight Lightness Control Mode Selection JP4 LVDS Port Operating VDD Selection JP5 mSATA Mini Card Operating VCC Selection JP6 Touch Screen 4 5 8 wire Mode Selection JP7 Auto Power ButtonEnable Disable Selection JP8 COM3 Pin8 Function Selection JP9 COM2 Pin8 Function Selection JP10 Front Panel Connector JP11 COM4 Pin8 Function Selection 2 3 1 Clear CMOS Jumper JP1 Normal Default Clear CMOS 2 ...

Page 25: ...Selection JP4 5V 3 3V Default 2 3 5 mSATA Mini Card Operating VCC Selection JP5 mSATA Default Mini Card 2 3 6 Touch Screen 4 5 8 Wire Selection JP6 4 8 Wire Mode Default 5 Wire Mode 2 3 7 Auto Power Button Enable Disable Selection JP7 Disable Enable Default Note Whendisabled use power button JP10 1 2 to power on the system 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 26: ... 4 5 6 1 2 3 4 5 6 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 1 2 3 4 5 6 1 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1...

Page 27: ...5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 4 5 6 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 1 2 3 4 5 6 1 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 ...

Page 28: ...5 DP Port CN6 LVDS Port CN7 LVDS Port Inverter Backlight Connector CN8 SPI Debug Port CN9 LAN RJ 45 Port1 CN10 LAN RJ 45 Port2 CN11 Mini Card Slot Full Mini Card CN12 Micro SIM Card Socket CN13 Mini Card Slot Half Mini Card CN14 SATA Port CN15 5V Output for SATA HDD CN18 USB 3 0 Ports CN19 USB 3 0 Ports CN20 USB 2 0 Port CN21 USB 2 0 Port CN22 Audio I O Port CN23 Touch Screen Connector CN24 Digita...

Page 29: ...w SMBus CN33 External 5VSB Input CN35 BIO Connector CN36 CPU FAN 2 4 1 Battery CN1 Pin Pin Name Signal Type Signal Level 1 3 3V PWR 3 3V 2 GND GND 2 4 2 DVI I Digital and Analog CN3 Pin Pin Name Signal Type Signal Level 1 DVI_D2 OUT 2 DVI_D2 OUT 3 GND GND 4 VGA_DDC_CLK I O 5 VGA_DDC_DAT I O 6 SCL I O 7 SDA I O 8 VGA_VSYNC OUT 9 DVI_D1 OUT 10 DVI_D1 OUT ...

Page 30: ...2 NC 13 NC 14 5V PWR 5V 15 GND GND 16 HPD IN 17 DVI_D0 OUT 18 DVI_D0 OUT 19 GND GND 20 NC 21 NC 22 GND GND 23 DVI_CLK OUT 24 DVI_CLK OUT C1 VGA_RED OUT C2 VGA_GREEN OUT C3 VGA_BLUE OUT C4 VGA_HSYNC OUT 2 4 3 DP Port CN5 Pin Pin Name Signal Type Signal Level 1 DP_D0 DIFF 2 GND GND 3 DP_D0 DIFF 4 DP_D1 DIFF 5 GND GND ...

Page 31: ...t Board GENE KBU6 Pin Pin Name Signal Type Signal Level 6 DP_D1 DIFF 7 DP_D2 DIFF 8 GND GND 9 DP_D2 DIFF 10 DP_D3 DIFF 11 GND GND 12 DP_D3 DIFF 13 GND GND 14 GND GND 15 DP_AUX DIFF 16 GND GND 17 DP_AUX DIFF 18 HPLG_DETECT IN 19 GND GND 20 5V I O 5V ...

Page 32: ... Driving Current supports up to 1 5A Pin Pin Name Signal Type Signal Level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 LCD_PWR PWR 3 3V 5V 4 GND GND 5 LVDS_A_CLK DIFF 6 LVDS_A_CLK DIFF 7 LCD_PWR PWR 3 3V 5V 8 GND GND 9 LVDS_DA0 DIFF 10 LVDS_DA0 DIFF 11 LVDS_DA1 DIFF 12 LVDS_DA1 DIFF 13 LVDS_DA2 DIFF 14 LVDS_DA2 DIFF PIN 1 PIN 2 PIN 30 PIN 29 ...

Page 33: ...9 LVDS_DB0 DIFF 20 LVDS_DB0 DIFF 21 LVDS_DB1 DIFF 22 LVDS_DB1 DIFF 23 LVDS_DB2 DIFF 24 LVDS_DB2 DIFF 25 LVDS_DB3 DIFF 26 LVDS_DB3 DIFF 27 LCD_PWR PWR 3 3V 5V 28 GND GND 29 LVDS_B_CLK DIFF 30 LVDS_B_CLK DIFF 2 4 5 LVDS Port Inverter Backlight Connector CN7 Pin Pin Name Signal Type Signal Level 1 BKL_PWR PWR 5V 12V 2 BKL_CONTROL OUT BLK_PWR 2 3 4 5 1 BKL_CONTROL GND GND BKL_ENABLE ...

Page 34: ...GND 4 GND GND 5 BKL_ENABLE OUT 5V Note 1 LVDS BKL_PWR can be set to 5V or 12V by JP2 Driving current supports up to 2A Note 2 LVDS BKL_CONTROL can be set by JP3 2 4 6 SPI Debug Port CN8 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC ...

Page 35: ...9 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 4 8 L AN RJ 45 Port2 CN10 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 1 ACT LINK LED SPEED LED 8 1 ACT LINK LED SPEED LED 8 ...

Page 36: ...DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 4 9 Mini Card Slot Full Mini Card CN11 Pin Pin Name Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC ...

Page 37: ... 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND ...

Page 38: ... Name Signal Type Signal Level 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V 2 4 10 Micro SIM Card Socket CN12 Pin Pin Name Signal Type Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 NC 5 GND GND 6 UIM_VPP PWR 7 UIM_DATA I O 8 NC ...

Page 39: ...ignal Type Signal Level 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 NC 9 GND GND 10 NC 11 PCIE_REF_CLK DIFF 12 NC 13 PCIE_REF_CLK DIFF 14 NC 15 GND GND 16 NC 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX mSATA_RX DIFF 24 3 3VSB PWR 3 3V ...

Page 40: ...F 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX mSATA_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX mSATA_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND ...

Page 41: ...Signal Type Signal Level 51 NC 52 3 3VSB PWR 3 3V Note CN13 can be selected for Mini Card or mSATA by changing BIOS 2 4 12 SATA Port 1 CN14 Pin Pin Name Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND Pin 1 Pin 7 ...

Page 42: ...Type Signal Level 1 5V PWR 5V 2 GND GND Note 5VOutput for SATA HDD driving current supports up to 1A 2 4 14 USB 3 0 Ports CN18 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 USB_SSRX DIFF 6 USB_SSRX DIFF 7 GND GND 5V GND 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 43: ... PWR 5V 11 USB_D DIFF 12 USB_D DIFF 13 GND GND 14 USB_SSRX DIFF 15 USB_SSRX DIFF 16 GND GND 17 USB_SSTX DIFF 18 USB_SSTX DIFF Note USB3 0 Ports support current up to 0 9A 2 4 15 USB 3 0 Ports CN19 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 44: ...e Signal Type Signal Level 5 USB_SSRX DIFF 6 USB_SSRX DIFF 7 GND GND 8 USB_SSTX DIFF 9 USB_SSTX DIFF 10 5VSB PWR 5V 11 USB_D DIFF 12 USB_D DIFF 13 GND GND 14 USB_SSRX DIFF 15 USB_SSRX DIFF 16 GND GND 17 USB_SSTX DIFF 18 USB_SSTX DIFF Note USB3 0 Ports support current up to 0 9A ...

Page 45: ...ame Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 GND GND Note USB2 0 Ports support current up to 0 5A 2 4 17 USB 2 0 Port CN21 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 GND GND Note USB2 0 Ports support current up to 0 5A ...

Page 46: ... CN22 Pin Pin Name Signal Type Signal Level 1 MIC_L IN 2 MIC_R IN 3 GND_AUDIO GND 4 LINE_L_IN IN 5 LINE_R_IN IN 6 GND_AUDIO GND 7 LEFT_OUT OUT 8 GND_AUDIO GND 9 RIGHT_OUT OUT 10 5V_AUDIO PWR 5V MIC_L 1 10 MIC_R LINE_L_IN LINE_R_IN LEFT_OUT RIGHT_OUT 5V_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO ...

Page 47: ... wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC GND 1 9 1 9 1 9 TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE GND TOP BOTTOM LEFT RIGHT NC NC NC NC GND UL Y UR H LL L LR X SENSE S NC NC NC 8 Wires 4 Wires 5 Wires ...

Page 48: ...ard GENE KBU6 5 wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 UL Y IN 3 UR H IN 4 LL L IN 5 LR X IN 6 SENSE S IN 7 NC 8 NC 9 NC 1 9 1 9 1 9 GND TOP BOTTOM LEFT RIGHT NC NC NC NC GND UL Y UR H LL L LR X SENSE S NC NC NC res 4 Wires 5 Wires ...

Page 49: ...P EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN GND 1 9 1 9 TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE GND TOP BOTTOM LEFT RIGHT NC NC NC NC GND UL Y UR H LL L LR X SENS NC NC NC 8 Wires 4 Wires ...

Page 50: ...ort CN24 Pin Pin Name Signal Type Signal Level 1 DIO0 I O 5V 2 DIO1 I O 5V 3 DIO2 I O 5V 4 DIO3 I O 5V 5 DIO4 I O 5V 6 DIO5 I O 5V 7 DIO6 I O 5V 8 DIO7 I O 5V 9 5V PWR 5V 10 GND GND Note DigitalI O port supports current up to 0 5A DIO1 DIO3 DIO5 DIO7 GND DIO0 1 2 9 10 DIO2 DIO4 DIO6 5V ...

Page 51: ...mation 37 3 5 Subcompact Board GENE KBU6 2 4 21 COM Port 1 CN25 Pin Pin Name Signal Type Signal Level 1 DCD IN 2 DSR IN 3 RX IN 4 RTS OUT 9V 5 TX OUT 9V 6 CTS IN 7 DTR OUT 9V 8 RI IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 52: ...pact Board GENE KBU6 2 4 22 COM Port 4 CN26 RS 232 Mode Pin Pin Name Signal Type Signal Level 1 DCD IN 2 DSR IN 3 RX IN 4 RTS OUT 5V 5 TX OUT 5V 6 CTS IN 7 DTR OUT 5V 8 RI 5V 12V IN PWR 5V 12V 9 GND GND DCD DSR RX RTS TX CTS DTR RI 5V 12V GND 1 9 ...

Page 53: ...pact Board GENE KBU6 RS 422 Mode Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS422_TX NC RS422_TX NC RS422_RX NC RS422_RX NC 5V 12V GND 1 9 ...

Page 54: ...nal Level 1 RS485_D I O 5V 2 NC 3 RS485_D I O 5V 4 NC 5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND Note 1 COM4RS 232 422 485 can be set by BIOS Default is RS 232 Note 2 Pin8 function can be set by JP11 Maximum driving current in power supply mode is 0 5A RS485_D NC RS485_D NC NC NC NC NC 5V 12V GND 1 9 ...

Page 55: ...pact Board GENE KBU6 2 4 23 COM Port 2 CN27 RS 232 Mode Pin Pin Name Signal Type Signal Level 1 DCD IN 2 DSR IN 3 RX IN 4 RTS OUT 5V 5 TX OUT 5V 6 CTS IN 7 DTR OUT 5V 8 RI 5V 12V IN PWR 5V 12V 9 GND GND DCD DSR RX RTS TX CTS DTR RI 5V 12V GND 1 9 ...

Page 56: ...pact Board GENE KBU6 RS 422 Mode Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS422_TX NC RS422_TX NC RS422_RX NC RS422_RX NC 5V 12V GND 1 9 ...

Page 57: ...Level 1 RS485_D I O 5V 2 NC 3 RS485_D I O 5V 4 NC 5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND Note 1 COM2 RS 232 422 485 can be set by BIOS setting Default is RS 232 Note 2 Pin8 function can be set by JP9 Maximum driving current in power supply mode is 0 5A RS485_D NC RS485_D NC NC NC NC NC 5V 12V GND 1 9 ...

Page 58: ...pact Board GENE KBU6 2 4 24 COM Port 3 CN28 RS 232 Mode Pin Pin Name Signal Type Signal Level 1 DCD IN 2 DSR IN 3 RX IN 4 RTS OUT 5V 5 TX OUT 5V 6 CTS IN 7 DTR OUT 5V 8 RI 5V 12V IN PWR 5V 12V 9 GND GND DCD DSR RX RTS TX CTS DTR RI 5V 12V GND 1 9 ...

Page 59: ...pact Board GENE KBU6 RS 422 Mode Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS422_TX NC RS422_TX NC RS422_RX NC RS422_RX NC 5V 12V GND 1 9 ...

Page 60: ...Level 1 RS485_D I O 5V 2 NC 3 RS485_D I O 5V 4 NC 5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND Note 1 COM3 RS 232 422 485 can be set by BIOS setting Default is RS 232 Note 2 Pin8 function can be set by JP8 Maximum driving current in power supply mode is 0 5A RS485_D NC RS485_D NC NC NC NC NC 5V 12V GND 1 9 ...

Page 61: ...ard GENE KBU6 2 4 25 LPC Port CN29 Pin Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 I2C_SDA I O 11 I2C_SCL I O 12 SERIRQ I O 3 3V ...

Page 62: ...e Signal Type Signal Level 1 12V PWR 9 36V or 12V 2 GND GND Note Pin 1 Vin maximum current rating is 7A 2 4 27 5VSB Output w SMBus CN32 Pin Pin Name Signal Type Signal Level 1 SMB_DATA I O 3 3V 2 GND GND 3 SMB_CLK I O 3 3V 4 GND GND 5 PS_ON OUT 3 3V 6 5VSB PWR 5V 12V GND SMB_DATA 1 6 GND SMB_CLK GND PS_ON 5VSB ...

Page 63: ... Signal Level 1 PS_ON OUT 3 3V 2 GND GND 3 5VSB PWR 5V Note Maximum current rating of Pin 3 5VSB is 2A 2 4 29 BIO Connector CN35 Pin Pin Name Signal Type Signal Level 1 12V_Dual PWR 12V 2 GND GND 3 GND GND 4 PCIE1_TX I O 5 PCIE1_RX I O 6 PCIE1_TX I O 7 PCIE1_RX I O 8 GND GND 9 GND GND 10 PCIE2_TX I O 5VSB GND PS_ON 1 2 3 ...

Page 64: ...el 11 PCIE2_RX I O 12 PCIE2_TX I O 13 PCIE2_RX I O 14 GND GND 15 GND GND 16 PS_ON OUT 17 NC 18 NC 19 5V_Dual PWR 5V 20 5V_Dual PWR 5V 21 5V_Dual PWR 5V 22 5V_Dual PWR 5V 23 PCIE_CLK OUT 24 PLT_RST OUT 25 PCIE_CLK OUT 26 GND GND 27 GND GND 28 NC 29 NC 30 NC 31 NC 32 GND GND 33 GND GND 34 NC 35 NC 36 NC ...

Page 65: ... 39 GND GND 40 NC 41 NC 42 GND GND 43 NC 44 USB 3 0_TX I O 45 GND GND 46 USB 3 0_TX I O 47 USB 2 0_D I O 48 GND GND 49 USB 2 0_D I O 50 USB 3 0_RX I O 51 GND GND 52 USB 3 0_RX I O 53 SMB_CLK I O 54 GND GND 55 SMB_DATA I O 56 PCIE_WAKE IN 57 GND GND 58 USB 2 0_OC IN 59 5V PWR 5V 60 USB 2 0_OC IN 61 5V PWR 5V 62 5V PWR 5V ...

Page 66: ...ame Signal Type Signal Level 63 5V PWR 5V 64 5V PWR 5V 65 LPC_AD0 I O 66 LPC_FRAME I O 67 LPC_AD1 I O 68 SERIRQ I O 69 LPC_AD2 I O 70 NC 71 LPC_AD3 I O 72 GPIO I O 73 GND GND 74 Audio_GND GND 75 LPC_CLK OUT 76 Audio_OUT_L OUT 77 PME IN 78 Audio_OUT_R OUT 79 GND GND 80 GND GND ...

Page 67: ...rmation 53 3 5 Subcompact Board GENE KBU6 2 4 30 CPU Fan CN36 Pin Pin Name Signal Type Signal Level 1 GND GND 2 FAN_POWER PWR 12V 3 FAN_TAC IN 4 FAN_CTL OUT 3 3V Note 12VOutput for FAN power Driving current supports up to 2A ...

Page 68: ...ion 54 3 5 Subcompact Board GENE KBU6 2 5 Thermal Solutions 2 5 1 GENE KBU6 HSK02 Single piece heatsink does not require heatspreader Extended temperature SKUs are tested using GENE SKU6 HSK02 thermal solution and under UEFI mode ...

Page 69: ...Chapter 2 Hardware Information 55 3 5 Subcompact Board GENE KBU6 GENE KBU6 HSK02 Assembly ...

Page 70: ...Chapter 2 Hardware Information 56 3 5 Subcompact Board GENE KBU6 2 5 2 GENE KBU6 FAN01 Active cooler used with heat spreader ...

Page 71: ...Chapter 2 Hardware Information 57 3 5 Subcompact Board GENE KBU6 GENE KBU6 FAN01 Assembly ...

Page 72: ...Chapter 2 Hardware Information 58 3 5 Subcompact Board GENE KBU6 2 5 3 GENE KBU6 HSK03 Heatsink for DRAM ...

Page 73: ...3 5 Subcompact Board GENE KBU6 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 74: ...verification routines check the current system configuration against the values stored in the CMOS memory If they do not match an error message will be output and the BIOS setup program will need to be run to set the configuration information in memory There are three situations in which the CMOS settings will need to be set or changed Starting the system for the first time The system hardware has...

Page 75: ...er is turned off To enter BIOS Setup press Del or F2 immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Access advanced hardware settings and options Chipset Chipset settings and options Security Set admin and user passwords access secure boot option Boot Boot option...

Page 76: ...Chapter 3 AMI BIOS Setup 62 3 5 Subcompact Board GENE KBU6 3 3 Setup Submenu Main ...

Page 77: ...Chapter 3 AMI BIOS Setup 63 3 5 Subcompact Board GENE KBU6 3 4 Setup Submenu Advanced ...

Page 78: ...echnology Disabled Enabled Optimal Default Failsafe Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology CPU C states Disabled Enabled Optimal Default Failsafe Default Enable Disable CPU Power Management Allows CPU to go to C states when it s not 100 utilized Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more ...

Page 79: ...ce TCG EFI protocoland INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA256 PCR Bank Pending operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Y our Computer will reboot d...

Page 80: ... Optimal Default Failsafe Default Select the TCG2 Spec Version Support TCG_1_2 the Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 2 1 3 Optimal Default Failsafe Default Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select TPM 1 2 TPM 2 0 Auto Optimal Def...

Page 81: ...bled Enable Disable SATA Device SATA Controller Speed Default Optimal Default Failsafe Default Gen1 Gen2 Gen3 Indicates the maximum speed the SATA controller can support Port Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Port Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Table Continues on Next Page ...

Page 82: ...Chapter 3 AMI BIOS Setup 68 3 5 Subcompact Board GENE KBU6 Options Summary Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable ...

Page 83: ...art Fan FAN1 Output Mode Output PWM mode open drain Linear Fan Application Optimal Default Failsafe Default Output PWM mode push pull Output PWM mode push pull to control 4 wire fans Linear fan application circuit to control 3 wire fan speed by fan s power terminal Output PWM mode open drain to control Intel 4 wire fans Note Optionalsupport for PWM mode is available on request ...

Page 84: ... Failsafe Default Smart Fan Mode Select Temperature 1 60 The settings shown in this section are the Optimal Default Failsafe Default settings Temperature 2 50 Temperature 3 40 Temperature 4 30 RPM Percentage 1 85 RPM Percentage 2 70 RPM Percentage 3 60 RPM Percentage 4 50 RPM Percentage 5 40 Auto fan speed control Fan speed will follow different temperature by different RPM 1 100 ...

Page 85: ...er 3 AMI BIOS Setup 71 3 5 Subcompact Board GENE KBU6 Manual RPM Mode Options Summary Manual RPM Mode 3000 Optimal Default Failsafe Default Manual mode fan control user can write expected RPM count 500 1000 ...

Page 86: ...Chapter 3 AMI BIOS Setup 72 3 5 Subcompact Board GENE KBU6 3 4 5 SIO Configuration ...

Page 87: ...his Device Disabled Enabled Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts ...

Page 88: ... Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 89: ...Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3E8h IRQ 11 IO 2E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 90: ...Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2E8h IRQ 11 IO 3E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 91: ...Configuration Options Summary Legacy USB Support Enabled Optimal Default Failsafe Default Disabled Auto Enables Legacy USB support Auto option disables legacy support if no USB devices are connected DISABLE option will keep USB devices available only for EFI applications ...

Page 92: ...8 3 5 Subcompact Board GENE KBU6 3 4 7 Digital IO Port Configuration Options Summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output level when DIO pin is output ...

Page 93: ...ult Enabled Configure power mode for power saving function Restore on Power Loss Last State Always On Always Off Optimal Default Failsafe Default Determine the system turn on or off after AC resume from G3 to S5 state RTC wake system from S5 Disabled Optimal Default Failsafe Default Fixed Time Fixed Time System will wake on the hr min sec specified Resume from PCIE Disabled Enabled Optimal Default...

Page 94: ...Chapter 3 AMI BIOS Setup 80 3 5 Subcompact Board GENE KBU6 Options Summary Resume from LAN RI Disabled Enabled Optimal Default Failsafe Default Enable Disable Resume from LAN RI ...

Page 95: ...d Legacy Optimal Default Failsafe Default Legacy only UEFI only This option controls Legacy UEFI ROMs priority Storage Do not launch UEFI Legacy Optimal Default Failsafe Default Controls the execution of UEFI and Legacy Storage OpROM Video Do not launch UEFI Legacy Optimal Default Failsafe Default Controls the execution of UEFI and Legacy Video OpROM ...

Page 96: ...Chapter 3 AMI BIOS Setup 82 3 5 Subcompact Board GENE KBU6 3 5 Setup Submenu Chipset ...

Page 97: ...Chapter 3 AMI BIOS Setup 83 3 5 Subcompact Board GENE KBU6 3 5 1 System Agent SA Configuration ...

Page 98: ...ry IGFX Boot Display VBIOS Default Optimal Default Failsafe Default DVI CRT DP LVDS Select the Video Device which will be activated during POST This has no effect if external graphics present Secondary boot display selection will appear based on your selection VGA modes will be supported only on primary display ...

Page 99: ...y LVDS Disabled Enabled Optimal Default Failsafe Default Enable Disabled this panel LVDS Panel Type 640x480 60Hz 800x480 60Hz 800x600 60Hz 1024x600 60Hz 1024x768 60Hz Optimal Default Failsafe Default 1024x768 60Hz 1280x800 60Hz 1280x1024 60Hz 1366x768 60Hz 1440x900 60Hz 1600x1200 60Hz 1920x1080 60Hz 1920x1200 60Hz Select panel type ...

Page 100: ...Depth Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz Optimal Default Failsafe Default 500Hz 1KHz 2 2KHz 6 5KHz Select PWM frequency of backlight control signal ...

Page 101: ...Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled Auto HDA will be enabled if present disabled otherwise PCI Express Root Port 5 CN11 Enabled Optimal Default Failsafe Default Disabled Control the PCI Express Root Port PCIe Speed Auto Optimal Default Failsafe Default Gen1 Gen2 Gen3 Configure PCIe speed ...

Page 102: ...U6 Options Summary Half MiniCard Slot Function SATA Optimal Default Failsafe Default PCIe Select function enabled for Half MiniCard CN13 slot Me FW Image Re Flash Disabled Optimal Default Failsafe Default Enabled Enable Disable Me FW Image Re Flash function ...

Page 103: ...hen the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to rem...

Page 104: ... Default Failsafe Default Enabled Secure Boot activated when Platform Key PK is enrolled System mode is User Deployed and CSM function is disable Secure Boot Mode Standard Custom Optimal Default Failsafe Default Secure Boot Mode selector Standard Custom In Custom mode Secure Boot Variables can be configured without authentication ...

Page 105: ...1 3 5 Subcompact Board GENE KBU6 3 6 1 1 Key Management Options Summary Provision Factory Default Disabled Optimal Default Failsafe Default Enabled Allow to provision factory default Secure Boot keys when System is in Setup Mode ...

Page 106: ...t Boot Disabled Enabled Optimal Default Failsafe Default Enables or Disables Quiet Boot option Launch PXE ROM Disabled Optimal Default Failsafe Default Enabled Controls the execution of Legacy PXE OpROM Boot mode select LEGACY UEFI DUAL Optimal Default Failsafe Default Select boot mode Legacy UEFI DUAL ...

Page 107: ...Chapter 3 AMI BIOS Setup 93 3 5 Subcompact Board GENE KBU6 3 8 Setup submenu Save Exit ...

Page 108: ...3 5 Subcompact Board GENE KBU6 Chapter 4 Chapter 4 Drivers Installation ...

Page 109: ...nstall them Step 1 Install Chipset Drivers 1 Open the Step1 Chipset folder followed by SetupChipset exe 2 Follow the instructions 3 Drivers will be installed automatically Step 2 Install Graphics Drivers 1 Open the Step2 Graphic folder and select your OS 2 Open the Setup exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 3 Install LAN Drivers 1 Click on...

Page 110: ...4 Drivers will be installed automatically Step 5 Install PenMount Touch 6000 Driver 1 Open the Step5 PenMount Touch 6000 folder followed by Setup exe 2 Follow the instructions 3 Drivers will be installed automatically Step 6 Install Serial Port Drivers Optional 1 Open the Step6 Serial Port Driver Optional folder followed by setup exe 2 Follow the instructions 3 Drivers will be installed automatica...

Page 111: ...tforms it is recommended to install Windows 7 through a SATA bus e g SATA DVD ROM or patch the xHCI driver onto an installation media for Windows 7 More information can be found in the links below Windows 7 USB 3 0 Creator Utility Read me For input devices please use an add on standard EHCI controller expansion card such as PCIe to USB 2 0 conversion card ...

Page 112: ...3 5 Subcompact Board GENE KBU6 Appendix A Appendix A Watchdog Timer Programming ...

Page 113: ...ble 0x00 7 1 Enable Disable time out output via WDTRST 0 Disable 1 Enable Pulse Width 0x05 0 1 01 Width of Pulse signal 00 1ms do not use 01 25ms 10 125ms 11 5s Pulse width is must longer then 16ms Signal Polarity 0x05 2 0 0 low active 1 high active Must set this bit to 0 Counting Unit 0x05 3 0 Select time unit 0 second 1 minute Output Signal Type 0x05 4 1 0 Level 1 Pulse Must set this bit to 1 Wa...

Page 114: ...Reg 0x05 Timer register define PSWidthBit 0x00 WDTRST Pulse width Bit0 1 define PSWidthVal 0x01 25ms for WDTRST pulse define PolarityBit 0x02 WDTRST Signal polarity Bit2 define PolarityVal 0x00 Low active for WDTRST define UnitBit 0x03 Unit for timer Bit3 define ModeBit 0x04 WDTRST mode Bit4 define ModeVal 0x01 0 level 1 pulse define EnableBit 0x05 WDT timer enable Bit5 define EnableVal 0x01 1 ena...

Page 115: ...e Value If Value 1 WDTSetBit TimerReg EnableBit 1 else WDTSetBit TimerReg EnableBit 0 VOID WDTParameterSetting byte Counter BOOLEAN Unit Watchdog Timer counter setting WDTWriteByte CounterReg Counter WDT counting unit setting WDTSetBit TimerReg UnitBit Unit WDT output mode set to pulse WDTSetBit TimerReg ModeBit ModeVal WDT output mode set to active low WDTSetBit TimerReg PolarityBit PolarityVal W...

Page 116: ...teByte byte Register byte Value IOWriteByte WDTAddr Register Value byte WDTReadByte byte Register return IOReadByte WDTAddr Register VOID WDTSetBit byte Register byte Bit byte Val byte TmpValue TmpValue WDTReadByte Register TmpValue 1 Bit TmpValue Val Bit WDTWriteByte Register TmpValue ...

Page 117: ...3 5 Subcompact Board GENE KBU6 Appendix B Appendix B I O Information ...

Page 118: ...Appendix B I O Information 104 3 5 Subcompact Board GENE KBU6 B 1 I O Address Map ...

Page 119: ...Appendix B I O Information 105 3 5 Subcompact Board GENE KBU6 ...

Page 120: ...Appendix B I O Information 106 3 5 Subcompact Board GENE KBU6 B 2 Memory Address Map ...

Page 121: ...Appendix B I O Information 107 3 5 Subcompact Board GENE KBU6 B 3 IRQ Mapping Chart ...

Page 122: ...Appendix B I O Information 108 3 5 Subcompact Board GENE KBU6 ...

Page 123: ...Appendix B I O Information 109 3 5 Subcompact Board GENE KBU6 ...

Page 124: ...Appendix B I O Information 110 3 5 Subcompact Board GENE KBU6 ...

Page 125: ...Appendix B I O Information 111 3 5 Subcompact Board GENE KBU6 ...

Page 126: ...Appendix B I O Information 112 3 5 Subcompact Board GENE KBU6 ...

Page 127: ...Appendix B I O Information 113 3 5 Subcompact Board GENE KBU6 ...

Page 128: ...Appendix B I O Information 114 3 5 Subcompact Board GENE KBU6 ...

Page 129: ...Appendix B I O Information 115 3 5 Subcompact Board GENE KBU6 ...

Page 130: ...Appendix B I O Information 116 3 5 Subcompact Board GENE KBU6 ...

Page 131: ...Appendix B I O Information 117 3 5 Subcompact Board GENE KBU6 ...

Page 132: ...3 5 Subcompact Board GENE KBU6 Appendix C Appendix C Electrical Specifications for I O Ports ...

Page 133: ...rd CN11 3 3VSB 1 5V 3 3V 1 1A 1 5V 0 375A Mini Card Slot Half Mini Card CN13 3 3VSB 1 5V 3 3V 1 1A 1 5V 0 375A 5V Output for SATA HDD CN15 5V 5V 1A USB 3 0 Ports CN18 5VSB 5V 1A per channel USB 3 0 Ports CN19 5VSB 5V 1A per channel USB 2 0 Ports CN20 5VSB 5V 0 5A per channel USB 2 0 Ports CN21 5VSB 5V 0 5A per channel Audio I O Port CN22 5V 5V 1A Digital IO Port CN24 5V 5V 1A COM Port 4 CN26 5V 12...

Page 134: ...3 5 Subcompact Board GENE KBU6 Appendix D Appendix D Digital I O Ports ...

Page 135: ...al Input Output Pin Electrical Specification Pin Type Input Threshold Voltage Output Voltage Note Low High Low High DIO0 I O 0 8 2 0 0 5 DIO1 I O 0 8 2 0 0 5 DIO2 I O 0 8 2 0 0 5 DIO3 I O 0 8 2 0 0 5 DIO4 I O 0 8 2 0 0 5 DIO5 I O 0 8 2 0 0 5 DIO6 I O 0 8 2 0 0 5 DIO7 I O 0 8 2 0 0 5 Note All DIO pins are 5V tolerant in input mode ...

Page 136: ...ures to complete its configuration and the AAEON initial DI O program is also attached based on which you can develop customized program to fit your application There are three steps to complete the configuration setup 1 Enter the MB PnP Mode 2 Modify the data of configuration registers 3 Exit the MB PnP Mode Undesired result may occur if the MB PnP Mode is not exited normally ...

Page 137: ...ection 0x06 0xA0 2 DIO3 Direction 0x06 0xA0 3 DIO4 Direction 0x06 0xA0 4 DIO5 Direction 0x06 0xA0 5 DIO6 Direction 0x06 0xA0 6 DIO7 Direction 0x06 0xA0 7 DIO0 Output Level 0x06 0xA1 0 0 low 1 high DIO1 Output Level 0x06 0xA1 1 DIO2 Output Level 0x06 0xA1 2 DIO3 Output Level 0x06 0xA1 3 DIO4 Output Level 0x06 0xA1 4 DIO5 Output Level 0x06 0xA1 5 DIO6 Output Level 0x06 0xA1 6 DIO7 Output Level 0x06 ...

Page 138: ...efine InputPin 0x00 define OutputPin 0x01 define OutputReg 0xA1 0 low 1 high define StatusReg 0xA2 0 low 1 high define PinLow 0x00 define PinHigh 0x01 define Pin0Bit 0x00 define Pin1Bit 0x01 define Pin2Bit 0x02 define Pin3Bit 0x03 define Pin4Bit 0x04 define Pin5Bit 0x05 define Pin6Bit 0x06 define Pin7Bit 0x07 VOID Main Boolean PinStatus Procedure AaeonReadPinStatus Input Example Read Digital I O P...

Page 139: ...Value ConfigDioMode PinBit OutputPin SIOBitSet DIOLDN OutputReg PinBit Value VOID SIOEnterMBPnPMode IOWriteByte SIOIndex 0x87 IOWriteByte SIOIndex 0x87 VOID SIOExitMBPnPMode IOWriteByte SIOIndex 0xAA VOID SIOSelectLDN byte LDN IOWriteByte SIOIndex 0x07 SIO LDN Register Offset 0x07 IOWriteByte SIOData LDN VOID SIOBitSet byte LDN byte Register byte BitNum byte Value Byte TmpValue SIOEnterMBPnPMode S...

Page 140: ...ExitMBPnPMode Boolean SIOBitRead byte LDN byte Register byte BitNum Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum SIOExitMBPnPMode If TmpValue 0 Return 0 Return 1 VOID ConfigDioMode byte PinBit byte Mode Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN DIOLDN IOWriteByte SIOIndex DirReg TmpValue IOReadByte SIOData TmpValue ...

Page 141: ...3 5 Subcompact Board GENE KBU6 Appendix E Appendix E Mating Connectors and Cables ...

Page 142: ...ctor JST PHR 2 2 Pins For HDD Power 1702150155 CN20 USB Port Connector Molex 51021 0500 USB Wafer Cable 1700050207 CN21 USB Port Connector Molex 51021 0500 USB Wafer Cable 1700050207 CN22 Audio Connector Molex 51021 1000 Audio Cable 1709100254 CN23 Touch Screen Connector JST SHR 9V S B N A N A CN24 Digital I O Connector Neltron 2026B 10 N A N A CN25 COM Port 1 Connector Molex 51021 0900 Serial Por...

Page 143: ... Connector Available Cable Cable P N Vendor Model no CN30 9 36V Vin Connector N A N A Power Cable 1702002010 CN32 External 5VSB Power output and PS_ON Catch Electron ics 2418HJ 06 N A N A CN33 External 5VSB Power Input and PS_ON JST PHR 3 ATX Cable 170220020B CN36 CPU Fan Connector Molex 22 01 2035 N A N A ...

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