C422 WSI/IPMI / X299 WSI/IPMI
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BCLK Step
Configure the BCLK step value.
BCLK Reset Range
Issue a reset when BCLK overclocking exceeds thie range.
Stable Delay
Configure the delay time after BCLK settings for stable signals. Unit: 1ms.
CPU BCLK Amplitude
Select BCLK amplitude for ClockGen CPU 0/1/2.
SRC BCLK Amplitude
Select BCLK amplitude for ClockGen SRC 0/1.
SATA BCLK Amplitude
Select BCLK amplitude for SATA.
CPU1 Slew Rate
Adjust the BCLK signal by defining the maximum change rate of the output voltage.
Higher values will result in a shorter signal rising time.
CPU2/SRC1 Slew Rate
Adjust the BCLK signal by defining the maximum change rate of the output voltage.
Higher values will result in a shorter signal rising time.
SRC0 Slew Rate
Adjust the BCLK signal by defining the maximum change rate of the output voltage.
Higher values will result in a shorter signal rising time.
SATA Slew Rate
Adjust the BCLK signal by defining the maximum change rate of the output voltage.
Higher values will result in a shorter signal rising time.
CPU PLL ORT
Overshoot Reduction Technology improves the BCLK signal to decrease overshoot/
undershoot. Default is Level 3.
