Arm
®
CoreLink™ GFC-200 Generic Flash Controller
Technical Reference Manual
Document ID: 101484_0000_01_en
Issue: 01
Programmers Model
Reset
0x0
Width
32
The following figure shows the bit assignments.
Figure 4-14: DATA0 register bit assignments
31
0
DATA0
The following table shows the register bit assignments.
Table 4-10: DATA0
Bits
Name
Function
[31:0]
DATA0
For reads from the embedded Flash, this field returns the read data bits[31:0].
For writes to the embedded Flash, this field contains the write data bits[31:0].
4.4.10 Data 1 register, DATA1
The DATA1 register contains data bits[63:32], for a read or write access to the embedded Flash.
The DATA1 register characteristics are:
Usage constraints
There are no usage constraints.
Configurations
Available in configurations where
FWDATA_WIDTH
> 32. When present, each APB interface has
its own instance of a DATA1 register.
Attributes
Offset
0x024
Type
Read/write
Reset
0x0
Width
32
The following figure shows the bit assignments.
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