Circuit Descriptions
© Copyright ARM Limited 1999. All rights reserved.
4-5
4.2.1
Logic analyzer connectors
Six 20-way box headers, POD1-6, are provided to allow connection of Hewlett Packard
20-pin (HP 01650-63203) pods suitable for use with an HP1650B-series logic analyzer
and thus trace the ARM710T activity. These connectors can also be used for expansion
purposes and give access to coprocessor bus, CPD[31:0]. The pinout of connectors
POD1 to 6 is given in Figure 4-1.
Figure 4-1 Boxed header pinouts
POD1
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
POD2
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
POD4
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
POD3
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
POD6
POD5
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
nOPC
nCPI
nUSER
CPnWAIT
VDD
CPA
CPB
CPDBE
TBIT
CPTESTREAD
CPTESTWRITE
VSS
VDD
CPDATA15
CPDATA13
CPDATA11
CPDATA9
CPDATA7
CPDATA5
CPDATA3
CPDATA1
VSS
CPCLK
CPDATA14
CPDATA12
CPDATA10
CPDATA8
CPDATA6
CPDATA4
CPDATA2
CPDATA0
EXTERN1
DBGRQ
XsNa
XnIRQ
COMMRX
DBGACK
RANGEOUT1
BIGEND
VDD
BREAKPT
EXTERN0
FCLK
COMMTX
RANGEOUT0
VSS
XFASTBUS
XnFIQ
VDD
CPDATA31
CPDATA29
CPDATA27
CPDATA25
CPDATA23
CPDATA21
CPDATA19
CPDATA17
VSS
CPDATA30
CPDATA28
CPDATA26
CPDATA24
CPDATA22
CPDATA20
CPDATA18
CPDATA16
VDD
XnTDOEN
RSTCLKBS
SCREG1
SCREG3
TCK2
TAPSM1
TAPSM3
IR1
VSS
SCREG0
SCREG2
TCK1
TAPSM0
TAPSM2
IR0
IR2
IR3
VDD
BnRES
AGNT001
AREQ001
PATHIN
PATHOUT
DSEL
HIGHZ
VSS
AGNT
AREQ
BCLK
DINBS