ISSUE
DRAWING NO.
DRAWING TITLE
DATE
Filename:
ECO No.
DESCRIPTION OF CHANGE
L198_CT2_SPDIF.SchDoc
rDAC SPDIF & Clocks
Contact Engineer:
L198CT
22/09/2010
INITIALS
Printed:
3
5
Sheet
of
Notes:
Contact Tel:
(01223) 203207
Peter Kuell
A & R Cambridge Ltd.
Pembroke Avenue
Cambridge CB25 9QR
Waterbeach
A2
ARCAM
USB_SDATA
USB_LRCK
USB_BCK
16V
C202
100N
V
C
C
1
G
N
D
2
O/P
3
RX200
OC-0805R*007
16V
C200
100N
+5V
DGND
DGND
2b
1a
RJ
SKT200
JYE TAI
DGND
0W063
R203
75R
+3V3
16V
C215
100N
DGND
DAC_MCLK
USB_BCK
USB_LRCK
USB_SDATA
DAC_BCK
DAC_LRCK
DAC_SDATA
SDA
SCL
SCL
SDA
2
4
1
IC200A
74LVC1G125
GND
3
VCC
5
IC200B
7
4
L
V
C
1
G
1
2
5
D200
BAT54S
DGND
+3V3
50V
C204
100P
/RESET
/RESET
P207
P219
Optical in
COAX in
Oscillator for USB audio
SCLK
4
CSB/GPO2
9
MCLK
20
RX0
3
RX1
2
P
V
D
D
+
1
1
P
G
N
D
1
2
XOP
14
RESETB
10
CLKOUT
13
BCLK
18
RX2
27
RX3
26
RX4/GPO3
25
RX5/GPO4
24
DIN
17
TX0
21
DOUT
16
XIN
15
LRCLK
19
GPO0/SWIFMODE
5
D
G
N
D
2
8
D
V
D
D
+
1
GPO1
6
RX6/GPO5
23
RX7/GPO6
22
SDOUT/GPO7
8
SDIN/HWMODE
7
IC201
WM8805GEDS
6.3V
C205
1UF
16V
C206
100N
DGND
+3V3_SPDIF
WM8805 decoupling
DGND
+3V3_SPDIF
0W063
R200
47R
0W063
R201
47R
5V to 3.3V conversion
SPDIF receiver
0W063
R210
10K
SWIFMODE sets 2 wire software mode
DGND
SPDIF_INT
0W063
R211
10K
DGND
SDIN/HWMODE sets software control (pull up on other sheet)
CSB/GPO2 sets I2C address = 0111 010x
DGND
50V
C201
27P
50V
C203
27P
X200
12MHz
DGND
R204
47R
SPDIF_SDATA
SPDIF_OPT
SPDIF_COAX
R207
47R
R208
47R
R209
47R
SPDIF_BCLK
SPDIF_LRCLK
SPDIF_MCLK
SCL
SDA
/RESET
SCLK
4
CSB/GPO2
9
MCLK
20
RX0
3
RX1
2
P
V
D
D
+
1
1
P
G
N
D
1
2
XOP
14
RESETB
10
CLKOUT
13
BCLK
18
RX2
27
RX3
26
RX4/GPO3
25
RX5/GPO4
24
DIN
17
TX0
21
DOUT
16
XIN
15
LRCLK
19
GPO0/SWIFMODE
5
D
G
N
D
2
8
D
V
D
D
+
1
GPO1
6
RX6/GPO5
23
RX7/GPO6
22
SDOUT/GPO7
8
SDIN/HWMODE
7
IC204
WM8805GEDS
6.3V
C209
1UF
16V
C210
100N
DGND
WM8805 decoupling
DGND
0W063
R217
10K
SWIFMODE sets 2 wire software mode
DGND
0W063
R218
10K
SDIN/HWMODE sets software control (pull up on other sheet)
CSB/GPO2 sets I2C address = 0111 011x
DGND
50V
C207
27P
50V
C208
27P
X201
11.2896MHz
DGND
R216
47R
MCLK_OSC
+3V3OSC
+3V3OSC
+3V3OSC
USB_MCLK
DGND
ENABLE_SPDIF*
USB_MCLK
R215
47R
R214
47R
R212
47R
DAC_MCLK
Master clock for USB needs to be kept
at the appropriate frequency all the
time, even when SPDIF input is
selected
50V
C211
10N
+3V3
DGND
MCLK MUX
DGND
DGND
I2S MUX
R202
47R
R205
47R
R206
47R
16V
C212
100N
+3V3
DGND
KLEER BOARD
KLEER_MCLK
DGND
KLEER_BCLK
KLEER_LRCLK
KLEER_SDATA
+5V
SERIAL_UC_TO_KLEER
SERIAL_KLEER_TO_UC
1
2
3
4
CT
CON202
AMP
UART0_TX
UART0_RX
+5V
DGND
Use this connector to program
& debug the Kleer module
spare
2
4
1
IC206A
74LVC1G125
+3V3
16V
C213
100N
DGND
GND
3
VCC
5
IC206B
7
4
L
V
C
1
G
1
2
5
0W063
R213
10K
DGND
UC_PROGRAM_MODE
buffer tr-states serial
TX line of Kleer
module while in
programming mode
ENABLE_SPDIF*
ENABLE_USB*
ENABLE_USB*
ENABLE_SPDIF*
ENABLE_USB*
R219
47R
ENABLE_KLEER*
KLEER_MCLK
ENABLE_KLEER*
ENABLE_KLEER*
DGND
KLEER_BCLK
KLEER_LRCLK
KLEER_SDATA
+3V3
16V
C214
100N
DGND
DGND
LAYOUT NOTE:
Ensure the 2 LVC244s and the series
resistors are placed close together
1
2
3
4
CT
CON203
AMP
DGND
+5V
SERIAL_UC_TO_KLEER
SERIAL_KLEER_TO_UC
Use this connector to program
the Atmel microcontroller
SERIAL_KLEER_TO_UC
SERIAL_UC_TO_KLEER
2
3
1
IC203A
74HC125D
5
6
4
IC203B
74HC125D
9
8
1
0
IC203C
74HC125D
12
11
1
3
IC203D
74HC125D
GND
7
VCC
14
IC203E
74HC125D
P208
P209
P210
P211
P213
P214
P215
P216
P217
P202
P220
P221
P222
P228
P225
P200
P203
P205
P201
P204
P206
P232
P233
P234
P236
P237
P238
P239
P240
P241
P230
P231
P235
P242
P243
P218
P223
P224
P226
P227
P229
P212
P245
P244
P246
DGND
50V
C222
10P
50V
C223
10P
50V
C224
10P
50V
C225
10P
DGND
50V
C216
10P
50V
C217
10P
50V
C219
10P
50V
C220
10P
50V
C221
10P
DGND
R224
10K
R223
10K
R222
10K
R221
10K
R220
10K
DGND
1
2
3
4
5
6
7
8
SLW
CON200
SAMTEC
1
2
3
4
5
6
7
8
SLW
CON201
SAMTEC
0W063
R225
10K
0W063
R226
10K
0W063
R227
10K
DGND
0W063
R228
10K
DGND
PK
12/04/10
None to this sheet
1.0
10_E066
OE*
1
A0
2
Y0
18
A1
4
Y1
16
A2
6
Y2
14
A3
8
Y3
12
IC202A
74LVC244ADB
OE*
19
A0
17
Y0
3
A1
15
Y1
5
A2
13
Y2
7
A3
11
Y3
9
IC202B
74LVC244ADB
GND
10
VCC
20
IC202C
74LVC244ADB
OE*
1
A0
2
Y0
18
A1
4
Y1
16
A2
6
Y2
14
A3
8
Y3
12
IC205A
74LVC244ADB
OE*
19
A0
17
Y0
3
A1
15
Y1
5
A2
13
Y2
7
A3
11
Y3
9
IC205B
74LVC244ADB
GND
10
VCC
20
IC205C
74LVC244ADB
PG
08/09/10
Change X200 to 12MHz
1.1
10_E122
PK
14/09/10
EMC changes from Telnova
2.0
10_E131
50V
C218
15P
DGND
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