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Arbor Technology EmETXe-a10R0, User Manual

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Arbor Technology EmETXe-a10R0 User Manual Download Page 36

- 28 -

BIOS

4.2.5  Trusted Computing

Setting

Description

Security Device 

Support

Enable

 (default) or 

Disable

 BIOS support for security 

device. O.S. will not show Security Device. TCG EFI 

protocol and INT1A interface will not be available.

Device Select

Select the TPM device: 

Options: 

TPM 1.2

, 

TPM 2.0

 and 

Auto

 (default)

 

►

TPM 1.2 will restrict supoort to TPM 1.2 devices

 

►

TPM 2.0 will restrict support to TPM 2.0 devices

 

►

Auto will support both with the default set to TPM 

2.0 devices if not found., TPM 1.2 device will be 

enumerated. 

Summary of Contents for EmETXe-a10R0

Page 1: ...EmETXe a10R0 COM Express Compact Type 6 CPU Module User s Manual Version 1 0 2020 12...

Page 2: ...Revision History Version Date Description 1 0 2020 12 Initial release...

Page 3: ...on 1 1 1 The Product 2 1 2 About This Manual 2 1 3 Specifications 3 1 4 Inside the Package 4 1 5 Ordering Information 4 1 5 1 Optional Accessories 5 1 6 Driver 7 2A Installation 5 Chapter 2 Board Over...

Page 4: ...CI Subsystem Settings 26 4 2 4 ACPI Settings 27 4 2 5 Trusted Computing 28 4 2 6 NVMe Configuration 29 4 2 7 Super IO Configuration 30 4 2 8 Hardware Monitor 31 4 2 9 CSM Configuration 32 4 2 10 USB C...

Page 5: ...iance with the directives of the Union European EU A Certificate of Compliance is available by contacting Technical Support This product has passed the CE test for environmental specifications when sh...

Page 6: ...ectronic Equipment RoHS Directive 2002 95 EC The above mentioned directive was published on 2 13 2003 The main pur pose of the directive is to prohibit the use of lead mercury cadmium hexava lent chro...

Page 7: ...ap when handling computer components 4 Place components on a grounded antistatic pad or on the bag that comes with the Single Board Computer whenever components are separated from the system Replacing...

Page 8: ...of or inability to use this product Vendor will not be liable for any claim made by any other related party Vendors disclaim all other warranties either expressed or implied including but not limited...

Page 9: ...1 Introduction 1 Chapter 1 Introduction...

Page 10: ...m By the architecture of Type 6 the board has two high performance connectors to promise stable data passing rate The soldered onboard AMD Ryzen R1000 processor along with integrated AMD Vega Core gra...

Page 11: ...ports 2 x USB 3 1 ports Serial Port 2 x UART ports RX TX only Expansion Bus 6 x PCIe x1 lanes 1 x PCIe x4 lane LPC SPI DIO 8 bit Digital Input Output Storage 2 x Serial ATA ports with 600MB s HDD tran...

Page 12: ...ackage Before you begin installing your single board please make sure that the following materials have been shipped 1 x EmETXe a10R0 COM Express CPU Module 1 x Quick Installation Guide If any of the...

Page 13: ...Type 6 evaluation carrier board with SIO F71869ED module in ATX form factor CBK 03 1705 00 Cable kit 1 x SATA cable 2 x COM Flat cables 1 6 Driver 7 2A Installation To install the drivers please visi...

Page 14: ...6 This page is intentionally left blank...

Page 15: ...7 Board Overview 2 Chapter 2 Board Overview...

Page 16: ...rm Factors The differences among the Module Type 6 and EmETXe a10R0 are summarized in table below Module Type Standard Type 6 EmETXe a10R0 Connectors 2 2 Connector Rows A B C D A B C D PCIe Lanes Max...

Page 17: ...9 Board Overview 2 2 Board Dimensions 2 9 2 95 95 4 76 4 87 4 87 54 48 32 39 2 7 6 0 Unit mm...

Page 18: ...Bus 2 x PCIex1 lanes 2 x PCIex1 lanes To Connector CD 1 x PCIex1 Gen3 GPP port4 PEC8606 PCIe switch Dual Chnnels 24 bit LVDS DDI0 DP CH7511B DP to LVDS SMBus 8 GPIO TCA 6408A SPI Bus SPI Bus SPI BIOS...

Page 19: ...ew 2 4 Connector Pin Definition Being a most commonly used Type 6 the EmETXe a10R0 features two board to board connectors on bottom side Bottom Side Top Side COM Express AB Connector COM Express CD Co...

Page 20: ...USB0 A46 VCC_RTC A47 EXCD0_PERST A48 EXCD0_CPPE A49 LPC_SERIRQ A50 GND FIXED A51 PCIE_TX5 A52 PCIE_TX5 A53 GPI0 A54 PCIE_TX4 A55 B56 PCIE_RX4 B57 GND B58 N C B59 N C B60 GND FIXED B61 N C B62 N C B63...

Page 21: ...VD C35 N C C36 N C C37 N C C38 N C C39 N C C40 GND FIXED C41 N C C42 N C C43 N C C44 RSVD C45 N C C46 N C C47 RSVD C48 N C C49 N C C50 GND FIXED C51 PEG_RX0 C52 PEG_RX0 C53 N C C54 PEG_RX1 C55 D56 PEG...

Page 22: ...14 This page is intentionally left blank...

Page 23: ...15 Installation Maintenance 3 Chapter 3 Installation Maintenance...

Page 24: ...Find the heat sink included in optional accessories See section 1 5 1 Optional Accessories on page 5 Apply thermal grease to be in contact with CPU and chipset on CPU module 2 Place the heat sink ove...

Page 25: ...on page 5 4 Mount the EmETXe a10R0 into PBE 1705 via COM Express connectors as below that is COM Express AB to AB and CD to CD AB connector CD connector 5 Secure the CPU module to the carrier board b...

Page 26: ...18 This page is intentionally left blank...

Page 27: ...19 BIOS 4 Chapter 4 BIOS...

Page 28: ...power is turned on When the computer is shut down the battery on the motherboard supplies the power for BIOS RAM The Main Setup screen lists the following information Info Item Description BIOS Name D...

Page 29: ...t save changes into CMOS a message screen will display and ask you to select OK or Cancel for exiting and discarding changes Use and to select and press Enter to confirm On the Sub Menu Exit current p...

Page 30: ...ings on page 26 ACPI Settings See 4 2 4 ACPI Settings on page 27 Trusted Computing See 4 2 5 Trusted Computing on page 28 NVMe Configuration See 4 2 6 NVMe Configuration on page 29 Super IO Configurat...

Page 31: ...23 BIOS Network Stack Configuration See 4 2 11 Network Stack Configuration on page 35 AMD CBS See 4 2 12 AMD CBS on page 36...

Page 32: ...24 BIOS 4 2 1 CPU Configuration Setting Description NX Mode Enable default Disable No execute page protection Function SVM Mode Enable default Disable CPU Virtualization...

Page 33: ...o select AMD fTPM switch Options AMD CPU fTPM default Depend on Tcg mod ule Route to LPC TPM Erase fTPM NV for factory reset Enable default Erase fTPM NV for factory rest when a new CPU is installed D...

Page 34: ...o PCI Latency timer Register Default 32 PCI Bus Clocks PCI X Latency Timer Value to be programmed into PCI Latency timer Register Default 64 PCI Bus Clocks Above 4G Decoding Enable Disable default 64b...

Page 35: ...Enables default or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select ACPI sleep state the system will enter when the SUSPEND...

Page 36: ...urity Device TCG EFI protocol and INT1A interface will not be available Device Select Select the TPM device Options TPM 1 2 TPM 2 0 and Auto default TPM 1 2 will restrict supoort to TPM 1 2 devices TP...

Page 37: ...29 BIOS 4 2 6 NVMe Configuration Access this submenu to view the NVMe controller and driver information...

Page 38: ...ion Setting Description Serial Port 1 2 3 4 Par allel Port Configuration See next page Restore AC Power Loss Specify what state to go to when power is re applied after a power failure Options Last Sta...

Page 39: ...31 BIOS 4 2 8 Hardware Monitor Access this page to view the hardware information...

Page 40: ...UEFI and Legacy default Legacy only and UEFI only Network Control the execution of UEFI and Legacy PXE OpROM Options Do not lauch default UEFI and Legacy Storage Control the execution of UEFI and Leg...

Page 41: ...and Auto AUTO option disables legacy support if no USB devices are connected Disable option will keep USB devices available only for EFI applications XHCI Hand off Enable default or Disable XHCI Hand...

Page 42: ...tions available a re 10 sec 20 sec default 30 sec 40 sec Device power up delay Use this item to set maximum time the device will take before it properly reports itself to the host controller Options a...

Page 43: ...35 BIOS 4 2 11 Network Stack Configuration Setting Description Network Stack Enables disables UEFI network stack Disabled is the default...

Page 44: ...ber of cores to be used SMTEN Can be used to disable multithreading Core Performance Boost To dynamically adjust and control the processor oper ating frequency Global C state Control Gloabl C Sate Con...

Page 45: ...7 BIOS 4 3 Chipset Setting Description SB USB Configuratoin See 4 3 1 SB USB Config on page 38 PCI E Port See 4 3 2 PCI E Port on page 39 Display Configuration See 4 3 3 Display Configuration on page...

Page 46: ...38 BIOS 4 3 1 SB USB Config Setting Description XHCI0 Port 0 5 Enable default disable default xHCI0 port 0 5...

Page 47: ...nabled ASPM Support Disable or set the ASPM level Force L0s will force all inks to L0s state Auto will allow BIOS to auto configure Disable will disable ASPM Options Disabled default L0s Entry L1 Entr...

Page 48: ...40 BIOS 4 3 3 Display Configuration Item Description Active LVDS Enable or Disable default active LVDS control...

Page 49: ...g Description Administrator Password To set up an administrator password 1 Select Administrator Password The screen then pops up an Create New Password dialog 2 Enter your desired password that is no...

Page 50: ...keyboard NumLock state Options On and Off default Quiet Boot Enable or Disable default Quiet Boot option Fast Boot Enable or Disable default boot with initializa tion of a minimal set of devices requi...

Page 51: ...Exit Exit system setup without saving the changes Enter the item and then a dialog box pops up Quit without saving Yes No Restore Defaults Restore Load Default values for all the setup op tions Enter...

Page 52: ...44 This page is intentionally left blank...

Page 53: ...45 Appendix Appendix...

Page 54: ...hdog timer by software programming I O ports Below are the source codes written in C please take them as WDT ap plication example include math h include stdio h include dos h int iWDTCount int sioInde...

Page 55: ...vice WDT outportb sioData 0x07 outportb sioIndex 0xF5 Disable WDT timer stop countdown outportb sioData 0x12 outportb sioIndex 0xAA Disable Super I O void SioWDTClear void outportb sioIndex 0x87 Enabl...

Page 56: ...48 Appendix outportb sioIndex 0xAA SIO Disable return iData...

Page 57: ...x0A delay 30000 iInput GPIOStatus printf Data 2x n iInput GPIOData 0x05 delay 30000 iInput GPIOStatus printf Data 2x n iInput return 0 void GPIOMode int iMode SMB_Byte_WRITE SMB_PORT_AD SMB_DEVICE_ADD...

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