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BIOS
4.2.3 PCI Subsystem Settings
Setting
Description
PCI Latency Timer
Value to be programmed into PCI Latency timer Register.
►
Default:
32
PCI Bus Clocks
PCI-X Latency
Timer
Value to be programmed into PCI Latency timer Register.
►
Default:
64
PCI Bus Clocks
Above 4G Decoding
Enable
/
Disable
(default) 64bit capable Devices to be
Decoded in Above 4G Address Space (Only if System
Supports 64 bit PCI Decoding).
Summary of Contents for EmETXe-a10R0
Page 1: ...EmETXe a10R0 COM Express Compact Type 6 CPU Module User s Manual Version 1 0 2020 12...
Page 2: ...Revision History Version Date Description 1 0 2020 12 Initial release...
Page 9: ...1 Introduction 1 Chapter 1 Introduction...
Page 14: ...6 This page is intentionally left blank...
Page 15: ...7 Board Overview 2 Chapter 2 Board Overview...
Page 17: ...9 Board Overview 2 2 Board Dimensions 2 9 2 95 95 4 76 4 87 4 87 54 48 32 39 2 7 6 0 Unit mm...
Page 22: ...14 This page is intentionally left blank...
Page 23: ...15 Installation Maintenance 3 Chapter 3 Installation Maintenance...
Page 26: ...18 This page is intentionally left blank...
Page 27: ...19 BIOS 4 Chapter 4 BIOS...
Page 39: ...31 BIOS 4 2 8 Hardware Monitor Access this page to view the hardware information...
Page 52: ...44 This page is intentionally left blank...
Page 53: ...45 Appendix Appendix...
Page 56: ...48 Appendix outportb sioIndex 0xAA SIO Disable return iData...