
Model 1000W1000G
Rev A
31
The current through Q1 is monitored by U2. The output of U2 is fed to an op amp (U5) which has a reference
voltage on the non-inverting input and it compares the output of U2 to the reference voltage and generates an
error signal to vary the gate voltage of the RF transistor Q1 which controls the drain current.
U3 is a positive 5V regulator. It supplies DC to the current sense circuit, U2, the op amp, U5, and the fault
detection circuit, U6. SW1 is a thermal switch. It closes at a heat sink temperature of approximately 70
˚
to
protect the module in the event of an over-temperature condition.
3.4 POWER SUPPLIES, DRIVER AMPLIFIER (PS1 THRU PS4)
PS1 is a Triple output supply (+5V, +15V, -15V). +5V is supplied to the A34 Switch Breakout Assembly and
A35 Regulator Assembly. +15V is supplied to the A24 Detector Assembly and A35 Regulator Assembly. -
15V is supplied A1 PreAmp and A35 Regulator Assembly.
PS2 is a +24V single output 300W supply. It supplies voltage to the seven cooling fans. B1, B3, B4, B6, B7,
B8 and B9.
PS3 is a +24V single output 1600W supply. It supplies the voltage to the A1 PreAmp and the drain voltage
for final modules A2, A6, A7 and A10.
PS4 is a +24V single output 3200W supply. It supplies the drain voltage to final modules A11 thru A15 and
A18 thru A21.
3.5 A22 16-WAY COMBINER
The 16-way combiner has impedance-matching. When the outputs of the 16 final amplifiers are fed to the 16-
way combiner, the combined output will be approximately 16 dB above the output of a single final amplifier.
3.6 A23 DUAL DIRECTIONAL COUPLER (SCHEMATIC 10046373)
The 63dB dual directional coupler is connected to the output of the 16-way combiner. The coupler monitors
the forward and reflected power.
3.7 A24 DETECTOR ASSEMBLY (SCHEMATIC 10045651)
The Dual Detector monitors the outputs from the A23 dual directional coupler. The dual detector provides
sample outputs of the forward and reverse powers and also DC outputs proportional to the forward and
reverse powers of the amplifier.
There are two identical channels in the dual detector; only the one J1 input is described. The input from J1 is
connected to a two-way splitter. The two-way splitter outputs go to a 6 dB attenuator (U3) and the RF input
of the power detector (U2). The power detector provides a DC output which provides a signal to display
output power and for amplifier protection. The output of attenuator (U3) is fed to a stage of gain (U4) which
is connected to a 3 dB attenuator (U5). The output from U5 provides an RF sample output which can be used
to monitor the amplifier output power. The gain from J1 to J2 is approximately 1.0 to 1.5 dB of gain.
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