Apogee 2349 DLTM4, Instructions Manual

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AL6300 DATA LINK TEST SET PRODUCT LINE MODEL 2349 DLTM4
A
POGEE
L
ABS
, I
NC
.
1
09.21.2017
210 South 3
rd
Street, North Wales, PA 19454
Tel: 215.699.2060 Fax: 215.699.2061
MODEL 2349
DLTM4
DATA LINK TEST MODULE
1. FEATURES

Independent Transmit & Receive
Functions

Bit Rate from 100 bps to 50 Mbps

Adjustable in 1 bps steps

Internal Synthesizer or External
Clock

20 ppm Accuracy and Stability

Input/Output Bit Code Selection:

NRZ-L/M/S; BiP-L/M/S;

RNRZ-L; DM-M/S

Link Delay Measurement

Round Trip or simplex

Simulates Doppler Shift

User Configurable Measurements
2. PURPOSE OF MODULE
The Model 2349 DLTM4 provides the capabilities needed to perform bit-error-rate performance testing of data
links and associated hardware, such as PCM bit synchronizers and frame synchronizers. Data bit rates from
100 bps to 50 Mbps are supported. Measurement capabilities include: Bit Error related tests, bit slip tests, and
measurement of round trip data link delay.
Basic input and output interfaces included on the module may be supplemented by the addition of I/O interface
modules at the system level.
3. FUNCTIONAL DESCRIPTION
The transmitter and receiver contain independent circuits to generate test data and to receive and detect errors
using either pseudo-random number (PRN) data sequences or time division multiplexed (TDM) programmed
data values (PCM data). No operator intervention is required to initiate the data synchronization process,
regardless of link delays. Data code conversion is included for all IRIG-106 codes.
Figure 1
is a functional
block diagram of the DLTM4 module.
The PRN Receiver automatically synchronizes a local data generator to the received PRN data sequence. The
error free locally generated data stream is compared bit-by-bit to the input data to detect and identify errors.
When using the PCM mode of operation, the format instructions entered into the transmit (TX) memory are
copied into the receive (RX) memory. The PCM Receiver monitors the received data stream, locates the frame
sync pattern and synchronizes a local data generator to the delayed PCM data being received. Bit by bit
comparisons are made between the received data and the local data generator to detect and identify received
errors.
The module occupies three slots in an AL4300-LCD or AL6300-LCD chassis.