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UG-901 

EVAL-AD7175-8SDZ User Guide 

 

Rev. 0 | Page 6 of 10 

Table 3. Power Supply Configurations

1

 

Configuration  Input Voltage Range 

Description 

Single Supply  
(Regulated) 

7 V to 9 V 

The 7 V to 9 V input is regulated to 5 V for AVDD1/AVDD2 and 3.3 V for IOVDD. This supply also 
powers the external 5 V reference. See the Single Supply (Regulated) section. 

Single Supply  
(Unregulated) 

7 V to 9 V, 5 V, and 
3.3 V 

The input is unregulated and connects directly to AVDD1/AVDD2 and IOVDD from J5. The 7 V to 
9 V input powers the external 5 V reference. See the Single Supply (Unregulated) section . 

Split Supply  
(Regulated) 

7 V to 9 V and −2.5 V 

The 7 V to 9 V input is regulated to 2.5 V for AVDD1/AVDD2 and 3.3 V for IOVDD. The 7 V to 9 V input 

powers the external 5 V reference, and the −2.5 V input is connected to AVSS directly (unregulated). 
See the Split Supply (Regulated) section. 

Split Supply  
(Unregulated) 

7 V to 9 V, ±2.5 V,  
and 3.3 V 

The input is unregulated and connects directly to AVDD1/AVDD2 and IOVDD from J5. The 7 V to 
9 V input powers the external 5 V reference. See the Split Supply (Unregulated) section. 

 

1

 Only one configuration can be used at a time. 

 

POWER SUPPLY CONFIGURATIONS 

Single Supply (Regulated) 

There are two available power supply options for the single-
supply (regulated) configuration. 

 

An ac-to-dc adapter (included) connected to J4. Set LK2 to 
Position B. 

 

A bench top power supply connected to J3. Set LK2 to 
Position A and ensure that AVSS = AGND = 0 V. 

Set all other links and solder links to the default settings as 
outlined in Table 1. 

Single Supply (Unregulated) 

To set up the board, use the following procedure: 
1.

 

Move SL5 to Position A and SL7 to Position B. 

2.

 

Connect the two terminals of J5 labeled AGND and AVSS. 

3.

 

Connect 0 V (GND) to J5 at the terminal labeled AGND. 

4.

 

Connect 5 V to J5 at the terminal labeled AVDD. 

5.

 

Connect 3.3 V to J5 at the terminal labeled IOVDD.  

6.

 

Connect the 7 V to 9 V input to either J3 or J4. 

Set all other links and solder links to the default settings as 
outlined in Table 1. 

Split Supply (Regulated) 

To set up the board, use the following procedure: 
1.

 

Remove SL12 to SL15. These links connect AVSS to AGND. 

2.

 

Connect a bench top power supply to J3 and set LK2 to 
Position A. Make sure that AVSS = −2.5 V in this case. 

3.

 

Set LK1 to Position B. This sets the input to the power 
monitor circuitry to work with the lower AVDD1 supply 
of 2.5 V. 

Set all other links and solder links to the default settings as 
outlined in Table 1. 
 
 
 

Split Supply (Unregulated) 

To set up the board, use the following procedure: 
1.

 

Move SL5 to Position A and move SL7 to Position B. 

2.

 

Remove SL12 to SL15. 

3.

 

Connect 0 V (GND) to J5 at the terminal labeled AGND. 

4.

 

Connect 2.5 V to J5 at the terminal labeled AVDD. 

5.

 

Connect −2.5 V to J5 at the terminal labeled AVSS. 

6.

 

Connect 3.3 V to J5 at the terminal labeled IOVDD. 

7.

 

Connect 7 V to 9 V to either J3 or J4. Connect or disconnect 
the AVSS terminal of J3 to the AVSS terminal of J5. 

8.

 

Set LK1 to Position B. This sets the input to the power moni-
tor circuitry to work with the lower AVDD1 supply of 2.5 V. 

Set all other links and solder links set to the default settings as 
outlined in Table 1. 

ANALOG INPUTS 

The 

EVAL-AD7175-8SDZ

 primary analog inputs can be applied 

in two separate ways: 

 

J10, J12, and J14 connectors on the left side of the board 

 

A0 to A3 SMB/SMA footprints on the evaluation board 

The analog inputs route directly to the associated analog input 
pins on the 

AD7175-8

, provided that the LK5 to LK20 links 

(on-board noise test) are removed. Th

AD7175-8

 evaluation 

software is set up to analyze dc inputs to the ADC. The 

AD7175-8

 input buffers work for dc input signals. 

REFERENCE OPTIONS 

The 

EVAL-AD7175-8SDZ

 includes an external 5 V reference, 

the 

ADR445

. The 

AD7175-8

 includes an internal 2.5 V reference. 

The default operation is to use the external reference input, 
which is set to accept the 5 V 

ADR445

 on the evaluation board. 

Choose the reference in the SETUPCONx registers associated 
with Setup 0 to Setup 7 to select the reference used for 
conversions by the 

AD7175-8

. 

Change between the internal and external references by 
accessing th

AD7175-8

 register map in the evaluation software 

(click 

ADC Setup

). 

 

Summary of Contents for EVAL-AD7175-8SDZ

Page 1: ... on the information therein All referenced brands product names service names and trademarks are the property of their respective owners 00000005981LF 000 EOS Power Buy Now We have 45 000 LP502030 PCM NTC LD A02554 EEMB Lithium Battery Rectangular 3 7V 250mAh Rechargeable in stock now Starting at 0 034 This EEMB part is fully warrantied and traceable 1 855 837 4225 Give us a call International 1 5...

Page 2: ...board connects to a USB port via the SDP B system demonstration platform controller board EVAL SDP CB1Z The AD7175 8 evaluation software fully configures the AD7175 8 device functionality via a user accessible register interface and provides dc time domain analysis in the form of waveform graphs histograms and associated noise analysis for ADC performance evaluation Full specifications on the AD71...

Page 3: ...oise Test 3 Evaluation Board Hardware 4 Device Description 4 Hardware Link Options 4 Sockets and Connectors 5 Serial Interface 5 Power Supplies 5 Power Supply Configurations 6 Analog Inputs 6 Reference Options 6 Evaluation Board Software 7 Software Installation 7 Launching the Software 7 Software Operation 8 Overview of the Main Window 8 Control Toolbar 8 Data Section 9 Analysis Section 9 Status 9...

Page 4: ... B board to the PC via the USB cable For Windows XP you may need to search for the SDP drivers Choose to automatically search for the drivers for the SDP B board if prompted by the operating system 6 From the Analog Devices subfolder in the Programs menu launch the AD7175 8 software QUICK START NOISE TEST Use the following procedure to quickly test the noise performance 1 Insert Link LK5 to Link L...

Page 5: ... the following Position A AIN1 REF2 pin on the AD7175 8 Position B Buffer U6 Position C U7 for use with a single ended to differential driver circuit Position D J15 7 SL2 A Routes A2 to one of the following Position A AIN2 pin on the AD7175 8 Position B Buffer U10 Position C U9 for use with a single ended to differential driver circuit SL3 A Routes A3 to one of the following Position A AIN3 pin on...

Page 6: ...t MC 1 5 6 G 3 81 FEC3704762 J15 Optional header 7 way 2 54 mm pin header Samtec SSW 107 01 T S FEC1803478 J16 Optional header 7 way 2 54 mm socket Samtec TLW 107 05 G S FEC1668499 1 Order codes starting with FEC are for Farnell SERIAL INTERFACE The EVAL AD7175 8SDZ evaluation board connects to the Blackfin ADSP BF527 on the SDP B controller board via the serial peripheral interface SPI There are ...

Page 7: ...ed in Table 1 Split Supply Regulated To set up the board use the following procedure 1 Remove SL12 to SL15 These links connect AVSS to AGND 2 Connect a bench top power supply to J3 and set LK2 to Position A Make sure that AVSS 2 5 V in this case 3 Set LK1 to Position B This sets the input to the power monitor circuitry to work with the lower AVDD1 supply of 2 5 V Set all other links and solder lin...

Page 8: ...ers Installation Confirmation Dialog Box After installation is complete connect the EVAL AD7175 8SDZ evaluation board to the EVAL SDP CB1Z SDP B board as shown in Figure 2 Connect the SDP B board via the USB cable to the computer Take the following steps to verify that the SDP B controller board driver is installed and working correctly 1 Allow the Found New Hardware Wizard to run 2 After the driv...

Page 9: ...in the graphs of the DATA and ANALYSIS sections of the main window The Samples numeric control is the number of samples gathered per batch Sampling Sampling set to Capture in Figure 7 enacts the sampling mode used by the software This is unrelated to the ADC mode The user can capture a defined sample set or continuously gather batches of samples In both cases the number of samples set in the Sampl...

Page 10: ...inputs for that channel labeled next to the on and off controls These controls only affect the display of the channels and do not have any effect on the channel settings in the ADC register map Latest Data These indicators show the value of the last sample gathered on the corresponding channel see Channel Selection ANALYSIS SECTION Analysis Histogram and Analysis Channel The histogram shows the an...

Page 11: ...ny other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluat...

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