8
Rev. 0
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
37V - 57V
1. ALL RESISTORS AND CAPACITORS ARE 0603 2. ALL RESISTORS TOLERANCE RATING ARE 5%
NOTE 1: UNLESS OTHERWISE SPECIFIED
JUMPER SELECTIONS
RCLASS JUMPERS
JP1
JP3
JP5
JP7
JP9
JP11
JP13
JP15
JP17
JP2
JP4
JP6
JP8
JP10
JP12
JP14
JP16
JP18
RCLASS JUMPERS
USE VOUT+ AND VOUT- TERMINALS TO CONNECT TO A PWRGD ENABLED POWER SUPPLY ONLY.
USE VOUT+ AND LAB_TEST_VOUT- TERMINALS FOR LAB TESTING WITH ELECTRONIC OR RESISTIVE LOAD ONLY. NOT NEEDED FOR FINAL CIRCUIT.
802.3bt REQ. POWER
40W
51W
62W
71.3W
38.7W
52.7W
70W
90W
LTPoE++ REQ. POWER
13W
3.84W
6.49W
13W
25.5W
PD CLASS
0
1
2
3
4
5
6
7
8
VPORTP
VPORTN
PWRGD
REVISION HISTORY
DESCRIPTIO
N
DATE
APPROVED
EC
O
REV
ERIC H.
1ST PROTOTYPE
81-
92-
11
1
__
REVISION HISTORY
DESCRIPTIO
N
DATE
APPROVED
EC
O
REV
ERIC H.
1ST PROTOTYPE
81-
92-
11
1
__
REVISION HISTORY
DESCRIPTIO
N
DATE
APPROVED
EC
O
REV
ERIC H.
1ST PROTOTYPE
81-
92-
11
1
__
SIZE
DATE:
.V
ER
.
ON
CI
SHEE
T
OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.analog.com
1
Thursday, November 29, 2018
1
2
IEEE 802.3bt COMPLIANT, LTPoE++
ERIC H.
N/A
LT4293IDD, LT4321IUF DEMO CIRCUIT 2911A
KIM T.
INTEROPERABLE POWERED DEVICE
SIZE
DATE:
.V
ER
.
ON
CI
SHEE
T
OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.analog.com
1
Thursday, November 29, 2018
1
2
IEEE 802.3bt COMPLIANT, LTPoE++
ERIC H.
N/A
LT4293IDD, LT4321IUF DEMO CIRCUIT 2911A
KIM T.
INTEROPERABLE POWERED DEVICE
SIZE
DATE:
.V
ER
.
ON
CI
SHEE
T
OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.analog.com
1
Thursday, November 29, 2018
1
2
IEEE 802.3bt COMPLIANT, LTPoE++
ERIC H.
N/A
LT4293IDD, LT4321IUF DEMO CIRCUIT 2911A
KIM T.
INTEROPERABLE POWERED DEVICE
D2
PTVS58VP1UTP
2
1
JP14
RMPS
2W 2512
3.0k
R11 0
TP5
JP18
JP1
RC5 34.8
080
5
1%
JP3
JP8
RC12 49.9
080
5
1%
RC11 64.9
080
5
1%
RC8 140
080
5
1%
D1
PMEG10030ELPX
2
1
C3 47nF X7R 100V 0805S
R16
*
1%
0805S
RCLS
R14 100k
RC6 1.00k
080
5
1%
C1 0.047uF
100V 0603
JP15
TP1
E7
LAB_TEST_VOUT-
Q1
PSMN040-100MSE
6
4
5
8 7
1
2
3
JP2
Q11
PSMN040-100MSE
6
4
5
8
7
1 2 3
+
C4 22uF 100V
R19 30k
RC13 118
0805
1%
C2 OPT 0402S
E2
VOUT-
RC3 76.8
080
5
1%
RC7 37.4
080
5
1%
E5
AUX+
R15 100k
TP3
RC2 140
080
5
1%
JP5
R13 3.3k
JP6
U1
LT4293IDD
GND
1
AUX
2
RCLASS
3
+
4
GND
5
T2P
6
PWRGD
7
HSSRC
8
HSGATE
9
VPORT
10
EP
11
R10 52.3k
TP4
E1
VOUT+
JP13
R17
OPT
0805S 1%
RCLS++
JP16
JP17
RC4 49.9
080
5
1%
R9
1%
174k
JP10
RC10 76.8
080
5
1%
E3
T2P
RC9
080
5
1%
46.4
RC1 1.00k
080
5
1%
D3 GRN
1
2
JP4
E4
PWRGD
JP7
JP11
JP9
TP2
D4
MMSZ5242BS, 12V
2
1
R12 8.2 0805S
E6
AUX-
JP12
+
RCLASS
+
RCLASS
VPORTN
