Analog Devices ADZS-21569-EZKIT, Manual

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bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize
EMI.
ADAU1977 - Quad ADC with Diagnostics
The ADAU1977 incorporates four high performance analog-todigital converters (ADCs) with direct-coupled inputs
capable of 10 V rms. The ADC uses multibit sigma-delta (
Σ - Δ ) architecture with continuous time front end for low
EMI. The ADCs can be connected to the electret microphone (ECM) directly and provide the bias for powering the
microphone. Built-in diagnostic circuitry detects faults on input lines and includes comprehensive diagnostics for
faults on microphone inputs. The faults reported are short to battery, short to microphone bias, short to ground,
short between positive and negative input pins, and open input terminals. In addition, each diagnostic fault is availa-
ble as an IRQ flag for ease in system design. An I2C/SPI control port is also included. The ADAU1977 uses only a
single 3.3 V supply. The part internally generates the microphone bias voltage. The microphone bias is programma-
ble in a few steps from 5 V to 9 V. The low power architecture reduces the power consumption. An on-chip PLL
can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with a frame
clock, the PLL eliminates the need for a separate high frequency master clock in the system.
ADAU1979 - Quad Analog-to-Digital Converter
The ADAU1979 incorporates four high performance, analog-to-digital converters (ADCs) with 4.5 V rms capable
ac-coupled inputs. The ADCs use a multibit sigma-delta (
Σ
-
Δ
) architecture with continuous time front end for low
EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume
and many other parameters. The ADAU1979 uses only a single 3.3 V supply. The device internally generates the
required digital DVDD supply. The low power architecture reduces the power consumption. The on-chip PLL can
derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame
clock, it eliminates the need for a separate high frequency master clock in the system.
FT232R - USB to UART
The FT232R is a USB-to-serial-UART interface with the following advanced features:
•
Single chip USB to asynchronous serial data transfer interface
•
Entire USB protocol handled on the chip. No USB specific firmware programming required
•
Fully-integrated 1024 bit EEPROM storing device descriptors and CBUS I/O configuration
•
Fully-integrated USB termination resistors
•
Fully-integrated clock generation with no external crystal required, plus optional clock output selection ena-
bling a glue-less interface to external MCU or FPGA
•
Data transfer rates from 300 baud to 3 Mbaud (RS422, RS485, RS232) at TTL levels
•
128 byte receive buffer and 256 byte transmit buffer utilizing buffer smoothing technology to allow for high-
data throughput
ADAU1977 - Quad ADC with Diagnostics
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