ADXL180
Rev. 0 | Page 51 of 56
UD[7:0] USER DATA BITS
The user register is for arbitrary user data. It does not have any
influence on sensor operation. This data is transmitted during
Phase 2 of the state machine. For more information on trans-
mission format and timing, in particular depending on the
setting of MD bits, see the ADXL180 State Machine section.
Table 45. User Data Bit Definitions
Bit
Names
Definition
UD0
User Data Bit 0. No function, data only.
UD1
User Data Bit 1. No function, data only.
UD2
User Data Bit 2. No function, data only.
UD3
User Data Bit 3. No function, data only.
UD4
User Data Bit 4. No function, data only.
UD5
User Data Bit 5. No function, data only.
UD6
User Data Bit 6. No function, data only.
UD7
User Data Bit 7. No function, data only.
UD8 CONFIGURATION BIT
Table 46. UD8 Configuration Bit
UD8 Definition
0
Reserved, don’t care (default)
1 Reserved,
don’t
care
The value of the RS bit may be transmitted during Phase 2, inde-
pendent of UD[7:0], depending on the selection of the MD bits.
BDE
Table 47. Bus Discharge Enable
BDE Definition
0
Bus discharge disabled (default).
1
Bus discharge enabled. Only active when SYEN = 1.
The bus discharge enable (BDE) bit enables a discharge of the
bus voltage after a synchronization pulse is detected. If the BDE
bit is set, the ADXL180 changes the bus current (I
BUS
) level from
I
IDLE
to I
SIG
when a valid synchronization pulse has been detected.
See the Synchronous Communication section for more details
and timing information.
SCOE
Table 48. SCOE V
SCO
Signal Chain Output Enable
SCOE Definition
0 V
SCO
output disabled. (Default.)
1
V
SCO
output enabled. Analog output prior to ADC
conversion is present on V
SCO
pin. Connect V
SCO
to high
impedance input or data or sensor data may be
adversely affected.
FDLY
Table 49. Fixed Delay Mode
FDLY Definition
0
Fixed delay mode disabled (default).
1
Fixed delay mode enabled. Device transmits data in the
time slot delayed by t
DLY
as defined by DLY[2:0].
ADME
Table 50. Autodelay Mode Enable (ADME ) Options
ADME Definition
0
Autodelay mode disabled. The part does not check for
a second device on the line and does not pull any extra
current during startup. (Default.)
1
Autodelay mode detection enabled. I
DET
pull-down for
6 ms at power-up.
STI
Table 51. Self Test Internal (STI) Options
STI Definition
0
External self-test. User must monitor self-test data to
verify proper operation. Device does not monitor its own
response to the self-test stimulus. (Default.)
1
Internal self-test. The device monitors its own self-test
data to determine proper operation.
Table 52. Phase 3 Data Transmitted When STI = 1
MD1 MD0 Data
0 0 Device
OK
0 1 Range
1 0 Delimiter
1 1 Device
OK
FC[1:0]
Table 53. FC Low-Pass Filter Bandwidth Frequency Select Codes
FC1
FC0
−3 dB LP Frequency
0 0 400
Hz
0 1 200
Hz
1 0 100
Hz
1 1 800
Hz
RG[2:0]
Table 54. RG[2:0] Sensor Range Select Codes
RG2
RG1 RG0 Range
0
0 0 ±50
g
0
0 1 ±100
g
0
1 0 ±250
g
0
1 1 ±150
g
1
0 0 ±200
g
1
0 1 ±350
g
1
1 0 ±500
g
1
1 1 Not
used