ADSP-21479 EZ-Board Evaluation System Manual
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PREFACE
Thank you for purchasing the ADSP-21479 EZ-Board
®
, Analog Devices,
Inc. evaluation system for SHARC
®
processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation board is designed to be used in conjunction with the
CrossCore
®
Embedded Studio (CCES) and Vi+
®
development
environments to test the capabilities of the ADSP-21479 SHARC proces-
sors. The development environment aids advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the processor from a personal computer (PC) is achieved
through a USB port or an external JTAG emulator. The USB interface of
the standalone debug agent gives unrestricted access to the processor and
