Evaluation Board User Guide
UG-072
Rev. A | Page 17 of 20
GPIO INTERFACE BOARD SCHEMATICS
08697-012
S
DAT
A0
_
IN
L
RCL
K_
IN
BCL
K_
IN
S
DAT
A1
_
IN
S
DAT
A2
_
IN
S
DAT
A3
_
IN
S
DAT
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K_
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DAT
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6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
J1
50-
p
in
1
3
5
7
9
2
4
6
8
10
11
13
15
12
14
16
J2
HE
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R_
1
6
W
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_
UNS
HRO
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1
3
5
7
9
2
4
6
8
10
11
13
15
12
14
16
J3
HE
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T
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M
P
0
M
P
1
M
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2
M
P
3
M
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4
M
P
5
M
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6
M
P
7
M
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8
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M
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6
M
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7
M
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8
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9
M
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M
P
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1
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K_
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CKI
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CKO
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DD
M
CKO
M
CKI
DV
DD
Figure 12. GPIO Board Connector
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