AD9695 External Trigger Quick Start Guide
Figure 3: Time Capture of Trigger Pulse
Setup an external signal generator or other appropriate hardware, using the Ready signal if desired, to provide a 0 →1.5V+
rising edge on SMA1 J5 to trigger a capture. Note that the external pin must be driven for external trigger mode – if it is
left floating, the FPGA will function as though it is not i n external trigger mode, regardless of the mode it is put into.
3.
In VisualAnalog, open and setup a new canvas of the desired capture type – for example, an FFT canvas – and click the
Settings button on the ADC Capture Block.
Figure 4: ADC Data Capture Settings Button
