Rev 20 Feb 2014 17:53 | Page 5
with a 50Ω impedance. When connecting the ADC clock and analog source, use clean signal
generators with low phase noise, such as the Rohde & Schwarz SMA, or an equivalent. Use a shielded,
RG-58, 50Ω coaxial cable (optimally 1 m or shorter) for connecting to the evaluation board. Enter the
desired frequency and amplitude (see the Specifications section in the data sheet). When connecting
the analog input source, use of a multipole, narrow-band band-pass filter with 50Ω terminations is
recommended. Analog Devices uses band-pass filters from TTE and K&L Microwave, Inc. Connect the
filters as close to the evaluation board as possible.
Clock
The default clock input circuit is derived from an on-board 125MHz crystal oscillator feeding through a
transformer-coupled circuit using a high bandwidth 1:1 impedance ratio transformer (T302) that adds
negligible jitter to the clock path. The external clock input (J302) is 50 Ω terminated and ac-coupled to
handle single-ended sinusoidal inputs. The transformer converts the single-ended input to a
differential signal that is clipped by CR301 before entering the ADC clock inputs. The
ADC is
equipped with an internal clock divider (programmable divide ratios of 1 through 8) to facilitate usage
with higher frequency clocks. When using the internal divider and a higher input clock frequency,
remove CR301 to preserve the slew rate of the clock signal.
board is set up to be clocked through the transformer-coupled input network from
the 125MHz crystal oscillator, Y801. If an external clock source is desired, remove C302 (optionally)
and Jumper J304 to disable the oscillator from running and connect the external clock source to the
SMA connector, J302 (labeled CLOCK+).
If an external clock source is used instead of the onboard crystal oscillator, it should also be supplied
with a clean signal generator as previously specified for the analog input signals. Analog Devices
evaluation boards typically can accept ~2.8V p-p or 13 dBm sine wave input for the clock at the board
SMA clock connector.
Output Signals
The default setup uses the Analog Devices high speed converter evaluation platform (
) for data capture. The JESD204B outputs from the ADC are routed to P2 using 100Ω
differential traces. For more information on the data capture board and its optional settings, visit
Jumper Settings
Set the jumper settings/link options on the evaluation board for the required operating modes before
powering on the board. The functions of the jumpers are described in Table 1. Figure 2 shows the
default jumper settings.
