Analog Devices AD8330, Instruction Manual

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AD8330 Evaluation Board
EVAL-AD8330EB
Rev. B
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
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Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
GENERAL DESCRIPTION
The EVAL-AD8330EB is an easy-to-use accessory that enables a
hands-on evaluation of the
AD8330 variable gain amplifier
(VGA). It includes test pins for connections to all of the functional
device inputs. Figure 1 is a full size photograph of the board.
03721-009
Figure 1. Photograph of the AD8330 Evaluation Board
BASIC OPERATION
The input SMA connector IN is terminated with a 49.9 Ω
resistor (see Figure 2). For convenience, the board includes an
AD8131 high speed differential amplifier to convert a single-
ended signal source to the differential input of the AD8330. If
desired, the AD8131 can be removed and the AD8330 can be
driven at one of its inputs from a single-ended source.
The AD8330 output is observed at the SMA connectors OUT_HI
and OUT_LO or by using the 2-pin header OUT_HI/ OUT_LO
adjacent to the device.
The AD8330 requires only a +5 V power supply; however, because
of the AD8131 buffer bipolar power supply requirements, ±5 V
supplies are required to power the board. The current required
for the board is approximately 40 mA from the +5 V supply and
10 mA from the −5 V supply.
OPTIONS
Table 1 lists the jumpers on the board and their functions.
Consult the
AD8330 data sheet for further explanation of their
functions.
8
7
2
3
9
W4
DOWN
C5
0.1
μ
F
INLO
MODE
VPSI
INHI
VPSO
CMOP
OPLO
CNTR
OFST
OPHI
8
ENBL
VPOS
+5V
1
6
5
4
15
16
14
13
COMM
VMAG
VDBS
CMGN
12
11
10
C2
0.1
μ
F
W3
UP +5V
C3
0.1
μ
F
+5V
IN
+5V
C7
0.1
μ
F
CMGN1
VDBS
VMAG
C10
0.1
μ
F
C4
0.1
μ
F
+5V
C14
0.01
μ
F
C15
0.1
μ
F
VCMD
ENB
AD8131
3
4
5
6
1
2
C16
0.01
μ
F
–5V
AGND
AGND
AGND
AGND
C12
0.1
μ
F
R1
0
Ω
R5
49.9
Ω
R13
24.9
Ω
OUT_HI
OUT_LO
W1
FLTR
R12
1k
Ω
OUT_HI/LO
IN_HI/LO
AD8330
C13
1nF
+
C1
10
μ
F
10V
+
W2
OFST
C19
0.1
μ
F
C11
0.1
μ
F
C8
12pF
C9
12pF
C18
0.1
μ
F
C20
0.1
μ
F
C17
10
μ
F
10V
C6
0.1
μ
F
03
72
1
-00
1
Figure 2. Schematic Diagram