EVAL-AD8330EB
Rev. B | Page 2 of 4
Table 1. Functions of Jumpers
Name Function
W1
Connects a high-pass filter to the offset control loop
pin. This jumper is normally not installed.
W2
Disables the offset correction loop. This jumper is
installed for dc or low frequency operation.
W3
Mode up. Install for ascending gain with increasing
VDBS gain control voltage.
W4
Mode down. Install for descending gain with increasing
VDBS gain control voltage.
MEASUREMENT SETUP
The basic board connections for a typical measurement are
shown in Figure 3. To minimize circuit-loading effects, a low
capacitance FET probe is recommended for observing input or
output waveforms. Dual circuit headers IN_HI/LO and
OUT_HI/OUT_LO are provided for this purpose. The SMA
connectors OUT_HI and OUT_LO can also be used, but the
user may need to account for load capacitance effects.
EVAL-AD8330EB BOARD DESIGN
The EVAL-AD8330EB is a 4-layer design for maximum ground-
plane area. The evaluation board side silkscreen and wiring
patterns are shown in Figure 4 through Figure 9.
POWER SUPPLY
PRECISION VOLTAGE
REFERENCES
(FOR VDBS, VMAG)
NETWORK ANALYZER
DIFFERENTIAL
PROBE
GND
+5V
GND
SIGNAL
INPUT
03721-002
PROBE
POWER SUPPLY
03721-
003
Figure 3. Typical Connections
