UG-386
AD9642/AD9634/AD6672 User Guide
Rev. A | Page 8 of 26
2.
Click the
New DUT
button in the
SPIController
window
NEW DUT BUTTON
1059
3-
009
Figure 9. SPI Controller, New DUT Button
3.
In the
ADCBase 0
tab of the
SPIController
window, find the
CLK DIV(B)
section (see Figure 10). If using the clock
divider, use the drop-down box to select the correct clock
divide ratio, if necessary. See the appropriate part data sheet;
the
High Speed ADC SPI Control
Software
; and the
Interfacing to
High Speed ADCs via SPI
, for additional information.
Note that other settings can be changed on the
ADCBase 0
tab (see Figure 10). See the appropriate part data sheet; the
High Speed ADC SPI Control
Software
; and the
Interfacing to
High Speed ADCs via SPI
, for additional information on
the available settings.
Figure 10. SPI Controller, CLK DIV(B) Section