
AD5934
Rev. A | Page 23 of 40
Control Register Decode
Initialize with Start Frequency
This command enables the DDS to output the programmed
start frequency for an indefinite time. Initially, it is used to
excite the unknown impedance. When the output unknown
impedance has settled after a time determined by the user, the
user must initiate a start frequency sweep command to begin
the frequency sweep.
Start Frequency Sweep
In this mode, the ADC starts measuring after the programmed
number of settling time cycles has elapsed. The user has the
ability to program an integer number of output frequency cycles
(settling time cycles) to Register Address 0x8A and Register
Address 0x8B before the commencement of the measurement at
each frequency point (see Figure 30).
Increment Frequency
The increment frequency command is used to step to the next
frequency point in the sweep. This usually happens after data
from the previous step is transferred and verified by the DSP.
When the AD5934 receives this command, it waits for the
programmed number of settling time cycles before beginning
the ADC conversion process.
Repeat Frequency
There is the facility to repeat the current frequency point
measurement by issuing a repeat frequency command to the
control register. This command allows users to average
successive readings.
Power-Down Mode
The default state at power-up of the AD5934 is power-down
mode. The control register contains the code 1010,0000,0000,0000
(0xA000). In this mode, both the output and input pins, VOUT
and VIN, are connected internally to GND.
Standby Mode
This mode powers up the part for general operation. In standby
mode, the VIN and VOUT pins are internally connected to GND.
Reset
A reset command allows the user to interrupt a sweep. The start
frequency, number of increments, and frequency increment
register contents are not overwritten. An initialize with start
frequency command is required to restart the frequency sweep
command sequence.
Output Voltage Range
The output voltage range allows the user to program the
excitation voltage range at VOUT.
PGA Gain
The PGA gain allows the user to amplify the response signal
into the ADC by a multiplication factor of ×5 or ×1.
START FREQUENCY REGISTER (REGISTER
ADDRESS 0x82, REGISTER ADDRESS 0x83,
REGISTER ADDRESS 0x84)
The start frequency register contains the 24-bit digital
representation of the frequency from where the subsequent
frequency sweep is initiated. For example, if the user requires
the sweep to start from a frequency of 30 kHz using a 16.0 MHz
clock, the user must program the value 0x3D to Register Address
0x82, the value 0x70 to Register Address 0x83, and the value
0xA3 to Register Address 0x84. Doing this ensures the output
frequency starts at 30 kHz.
The start frequency code is
0x3D70A3
2
16
MHz
16
kHz
30
27
≡
×
⎟⎟
⎟
⎟
⎟
⎠
⎞
⎜⎜
⎜
⎜
⎜
⎝
⎛
⎟
⎠
⎞
⎜
⎝
⎛
=
Code
Frequency
Start
The default value of the start frequency register upon reset is as
follows: D23 to D0 are not reset at power-up. After the reset
command, the contents of this register are not reset.
FREQUENCY INCREMENT REGISTER (REGISTER
ADDRESS 0x85, REGISTER ADDRESS 0x86,
REGISTER ADDRESS 0x87)
The frequency increment register contains a 24-bit representation
of the frequency increment between consecutive frequency
points along the sweep. For example, if the user requires an
increment step of 30 Hz using a 16.0 MHz clock, the user must
program the value 0x00 to Register Address 0x85, the value
0x0F to Register Address 0x86, and the value 0xBA to Register
Address 0x87.
The formula for calculating the frequency increment is given by
0x00053E
2
16
MHz
16
Hz
10
27
≡
×
⎟⎟
⎟
⎟
⎟
⎠
⎞
⎜⎜
⎜
⎜
⎜
⎝
⎛
⎟
⎠
⎞
⎜
⎝
⎛
=
Code
Increment
Frequency
The user programs the value 0x00 to Register Address 0x85,
the value 0x05 to Register Address 0x86, and the value 0x3E to
Register Address 0x87.
The default value of the frequency increment register upon reset
is as follows: D23 to D0 are not reset at power-up. After the reset
command, the contents of this register are not reset.
Summary of Contents for AD5934
Page 35: ...AD5934 Rev A Page 35 of 40 SCHEMATICS 05325 144 Figure 40 EVAL AD5934EBZ USB Schematic ...
Page 36: ...AD5934 Rev A Page 36 of 40 05325 145 Figure 41 EVAL AD5934EBZ Schematic ...
Page 37: ...AD5934 Rev A Page 37 of 40 05325 146 Figure 42 Linear Regulator on EVAL AD5934EBZ ...
Page 38: ...AD5934 Rev A Page 38 of 40 05325 147 Figure 43 Decoupling on the EVAL AD5934EBZ ...