Communicating with the Host
• 5-4 •
The H.110 Basic Rate ISDN Board
phrase
Restart HB 00 (c) Amtelco 1999
appears in the receive mailbox. The
receive flag is not set and no interrupt is generated.
5.2 Interrupts
The H.110 Basic Rate ISDN Board can generate an interrupt to the PC
indicating that a message is available. The interrupt for PCI boards is
assigned by the BIOS or Operating System at boot time. The assignment
is dependent on which PCI slot the board is in. The interrupt line is usually
shared by more than one device. If multiple Infinity Series boards are
installed they may or may not all share the same interrupt line.
In order for an Infinity Series board to send interrupts to the PC, the PCI
Interface circuit on the board must be programmed to enable interrupts.
This is accomplished by setting bits 0 and 3 in the board's Interrupt
Control/Status Register. This is a byte-wide register located at an offset of
69h from PCI Base Address 0. PCI Base Address 0 is contained in PCI
Configuration Space register 10h. The Base address is a 32-bit value and
is mapped into memory.
When an Infinity Series board sends a message, it generates a local
interrupt to the PCI Interface circuit on the board. If the PCI Interface
circuit has been programmed to generate interrupts to the PC, the local
interrupt is passed through to the PC. When the PC receives an interrupt,
its Interrupt Service Routine (ISR) should check the Infinity board's receive
flag to see if a message is pending (i.e. the receive flag is non-zero). It
should then process the message for the board and write a 0 to the board's
receive flag.
5.2.1 Interrupt Initialization
1.
Clear the board's receive flag.
2.
Read the PCI Base Address 0 from PCI Configuration Space offset
10h (this must be a 32-bit access).