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Ampro ReadyBoard 700, Reference Manual

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ReadyBoard 700

Reference Manual

1

Chapter 1

About This Manual

Purpose of this Manual

This manual is for designers of systems based on the ReadyBoard™ 700 single board computer (SBC).
This manual contains information that permits designers to create an embedded system based on specific
design requirements.

Information provided

 in this reference manual includes:

•

ReadyBoard 700 Specifications

•

Environmental requirements

•

Major integrated circuits (chips) and features implemented

•

ReadyBoard 700 connector/pin numbers and definition

•

BIOS Setup information

Information not provided

 in this reference manual includes:

•

Detailed chip specifications

•

Internal component operation

•

Internal registers or signal operations

•

Bus or signal timing for industry standard busses and signals

Reference Material

The following list of reference materials may be helpful for you to complete your design successfully.
Most of this reference material is also available on the Ampro web site in the Embedded Design
Resource Center.  The Embedded Design Resource Center was created for embedded system developers
to share Ampro’s knowledge, insight, and expertise gained from years of experience.

Specifications

•

EPIC Specification Revision 1.1, July 16, 2004

Web site: 

http://www.epic-sbc.org/images/pdfs/EPICspec.pdf

•

PC/104 Specification Revision 2.5, November 2003

•

PC/104-Plus Specification Revision 2.0, November 2003

For latest revision of the PC/104 specifications, contact the PC/104 Consortium, at:

Web site: 

http://www.pc104.org

•

PCI 2.2 Compliant Specifications

For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at:

Web site: 

http://www.pcisig.com

Summary of Contents for ReadyBoard 700

Page 1: ...ReadyBoard 700 Single Board Computer Reference Manual P N 5001722A Revision C ...

Page 2: ...lication from time to time without obligation to notify any person of such revisions If errors are found please contact Ampro at the address listed below on the Notice page of this document TRADEMARKS Ampro and the Ampro logo are registered trademarks and CoreModule EnCore Little Board LittleBoard MiniModule ReadyBoard ReadyBox and ReadySystem are trademarks of Ampro Computers Inc All other marks ...

Page 3: ... 16 Environmental Specifications 16 Thermal Cooling Requirements 17 Mechanical Specifications 17 Chapter 3 Hardware 19 Overview 19 CPU U4 20 Memory 20 SDRAM Memory DIMM1 20 Flash Memory 20 Interrupt Channel Assignments 21 Memory Map 21 I O Address Map 22 PC 104 Plus Interface J12 23 PC 104 Interface J13 A B J14 C D 28 IDE Interface J22 33 CompactFlash Adapter J23 35 Floppy Parallel Interface J20 3...

Page 4: ...70 Converting the Splash Screen File 70 Appendix A Technical Support 73 Appendix B LAN Boot Option 75 Introduction 75 PXE Boot Agent BIOS Setup 76 Accessing PXE Boot Agent BIOS Setup 76 PXE Boot Agent Setup Screen 77 Index 79 List of Figures Figure 2 1 Stacking PC 104 Modules with the ReadyBoard 700 5 Figure 2 2 ReadyBoard 700 Functional Block Diagram 9 Figure 2 3 ReadyBoard 700 Component Location...

Page 5: ... Descriptions J23 35 Table 3 11 Floppy Parallel Interface Pin Signal Descriptions J20 37 Table 3 12 Serial A Serial 1 Interface Pin Signal Descriptions J5A 40 Table 3 13 Serial A Serial 2 Interface Pin Signal Descriptions J5B 40 Table 3 14 Serial B Interface Pin Signal Descriptions J3A B 41 Table 3 15 USB 1 2 Interface Pin Signal Descriptions J15 B 43 Table 3 16 USB 2 3 Interface Pin Signal Descri...

Page 6: ...Contents vi Reference Manual ReadyBoard 700 ...

Page 7: ...ming for industry standard busses and signals Reference Material The following list of reference materials may be helpful for you to complete your design successfully Most of this reference material is also available on the Ampro web site in the Embedded Design Resource Center The Embedded Design Resource Center was created for embedded system developers to share Ampro s knowledge insight and expe...

Page 8: ...0 documentation including this Reference Manual and the ReadyBoard 700 QuickStart Guide in PDF format the software utilities board support packages and drivers for the unique devices used with Ampro supported operating systems Other ReadyBoard Products ReadyBoard 550 This EPIC single board computer SBC used for high volume embedded applications provides designers with a low cost low power choice o...

Page 9: ...orts and general purpose I O GPIO ETX Family These high performance compact rugged Computer on Module COM solutions use various x86 processors in an ETX Revision 2 6 form factor to plug into your custom baseboard Each ETX module provides standard peripherals including dual Ultra DMA 33 66 100 IDE floppy drive interface PCI bus ISA bus serial parallel PS 2 keyboard and mouse interfaces 10 100BaseT ...

Page 10: ...Chapter 1 About This Manual 4 Reference Manual ReadyBoard 700 ...

Page 11: ...e EPIC standard boasts the same highly flexible and adaptable system expansion as EBX and PC 104 allowing easy and modular addition of functions such as USB 2 0 Firewire or wireless networking not usually contained in standard product offerings EPIC system expansion is based on the existing and popular PC 104 and PC 104 Plus standards PC 104 places the ISA bus on compact 3 6 x 3 8 modules with sel...

Page 12: ...ansion buses for additional system functions These busses offer compact self stacking modular expandability The PC 104 is an embedded system version of the signal set provided on a desktop PC s ISA bus The PC 104 Plus bus includes this signal set and in addition signals implementing a PCI bus available on an additional 120 pin 4 rows of 30 pins PCI expansion bus connector This PCI bus operates at ...

Page 13: ...FO for ECP mode Serial Ports Four buffered serial ports with full handshaking Supports two DB9 connectors Serial 1 2 COM1 COM2 Supports two serial ports Serial 3 4 COM3 COM4 through 20 pin header Provides 16550 equivalent controllers each with a built in 16 byte FIFO buffer Supports full modem capability and RS232 on all four ports Supports RS485 or RS422 operation two ports Serial 3 4 COM3 COM4 S...

Page 14: ... and receive frames simultaneously Supports IEEE 802 3x Flow control in full duplex mode Half duplex mode supports enhance proprietary collision reduction mode Video Interfaces CRT LCD LVDS Supports CRT 1600 x 1200 with 32MB UMA Unified Memory Architecture Supports standard 15 pin VGA connector AGP 4x graphics Compliant with AGP Rev 2 0 Interface standard 36 bit flat panel outputs DSTN TFT on pin ...

Page 15: ...oard Mouse SMBus Northbridge VT8606 PC 104 Plus Bus Connector PCI Bus IrDA 1 1 Floppy Parallel AC 97 CODEC COM3 COM4 IDE Primary IDE Secondary USB Port 4 USB Port 3 USB Port 2 USB Port 1 USB ATA PC 104 Connector Super I O Dual Serial Port COM1 COM2 ISA Bus AC 97 Link Clock Temp 512kB ROM BIOS Ethernet Controller 82251ER CRT VGA TFT LCD LVDS LCD Magnetics RJ45 GPIO User Defined CompactFlash Socket ...

Page 16: ...hbridge U10 VIA Technologies Inc VT82C686B Southbridge provides most standard I O functions I O Functions Super I O Controller U3 WinBond Electronics Corp W83877TF Super I O controller for GPIO and Serial ports 3 and 4 Some I O Functions Ethernet Controllers U9 U11 Intel 82551ER Controllers provide two independent 10 100BaseT Ethernet channels Ethernet functions RB700_01ab U6 U4 Y1 D1 J6 J4 J3 J2 ...

Page 17: ...50 pin 1mm connector 36 bit output for LCD panels J10 Ethernet 1 LEDs 14 pin connector for 8 pin RJ45 and LEDs for Ethernet port 1 J11 Ethernet 2 LEDs 14 pin connector for 8 pin RJ45 and LEDs for Ethernet port 2 J12 PC 104 Plus 120 pin 2mm connector for PCI bus J13A J13B J14C J14D PC 104 bus 104 pins for PC 104 connector 64 pins J13 and 40 pins J14 J15A B USB 0 1 8 pin connector provides USB0 and ...

Page 18: ... 1 Fan J1 GPIO J2 Serial B J3 COM3 4 Serial A J5A B COM1 2 CRT J8 VGA LCD J9 LVDS J7 Ethernet 2 J11 Ethernet 1 J10 USB 0 1 J15A B PS 2 Keyboard Mouse J16 PC 104 J13A B J14A B Battery Header BT1 Utility J18 Audio In Out J19 USB 2 3 J21A B Floppy Parallel J20 IDE J22 IR Infrared J17 PC 104 Plus J12 Power On Header J6 Power In J4 Lithium Battery B1 Figure 2 4 Connector Locations Top view NOTE Pin 1 i...

Page 19: ...1 Fuse F4 Keyboard Mouse Fuse F2 Figure 2 5 Connector and Component Locations Bottom view NOTE Pin 1 is shown as a black square in all connectors and jumpers in all illustrations Additional Components The fuses in Table 2 4 are shown in Figure 2 5 Table 2 4 Additional Component Descriptions Component Description F1 1 AMP Auto reset Fuse for USB 0 F2 1 AMP Auto reset Fuse Keyboard Mouse shared prot...

Page 20: ... the activity link indicator and provides the status of Ethernet port 1 J10 A steady On LED indicates a link is established A flashing LED indicates active data transfers Ethernet Speed LED Speed LED This green LED is the Speed indictor and indicates transmit or receive speed of Ethernet port 1 J10 A steady Off LED indicates the port is at 10BaseT speed A steady On LED indicates the port is at 100...

Page 21: ... Y2 Y3 JP2 J12 J17 D2 U13 U12 J22 J20 J21 U1 U2 JP3 JP4 JP5 BT1 D4 JP6 JP1 U33 4 3 2 U12 U5 Q11 U32 J14 J13 1 Reset Switch SW1 Power On IDE Activity LEDs D4 TFT LCD Clock JP1 Reserved Factory use only J26 Flash BIOS JP5 CMOS Normal Clear JP3 CF Master Slave JP4 Serial B COM3 COM4 RS485 Termination JP6 LCD Voltage Setting JP2 Figure 2 6 Jumper Switch and LED Locations Top view ...

Page 22: ...pe Regulated DC voltages Regulated DC voltages Regulated DC voltages In rush Current Typical 1 9A 9 5W Typical 1 8A 9W Typical 1 94A 9 7W BIT Current Typical 2 11A 10 57W Typical 2 55A 12 73W Typical 3 5A 17 5W Notes In rush measured with video 64MB memory and power connected The BIT burn in test is conducted with 64MB SODIMM SDRAM floppy USB HDD CD ROM keyboard mouse serial loopbacks USB CompactF...

Page 23: ...tsink but no fan Mechanical Specifications Figures 2 7 and 2 8 show the top view and side views of the ReadyBoard 700 with the mechanical mounting dimensions RB700_01db 1 15 6 10 9 5 18 14 12 8 9 10 11 7 1 2 J10 J8 J5B 1 5 6 10 11 D4 J5 J5A 4 2 9 10 11 7 8 12 J11 J15 J16 SW1 1 5 8 1 J17 JP3 JP5 BT1 J26 JP6 U33 4 3 2 U12 U5 U32 6 300 6 100 3 649 3 600 2 800 0 500 0 0 0 200 0 200 0 0 4 100 4 300 6 1...

Page 24: ... 270 165 1 5 080 Mounting Hole Center at 4 Corners x 8 dims 8 763 30 835 30 810 16 256 3 048 9 169 7 899 12 700 1 295 12 623 13 893 1 701 2 54 1 391 15 290 16 510 14 071 12 954 1 828 6 985 6 985 4 572 9 906 2 032 9 398 47 625 34 29 8 588 15 849 15 849 1 727 17 678 All Dimensions in this drawing section are in Millimeters within 0 25mm Board thickness is 1 574mm Serial 1 2 J5A B Serial 1 Lower CRT ...

Page 25: ...J9 J7 Miscellaneous Utility Interfaces J18 Reset Switch SW1 Keyboard Mouse J16 Infrared IrDA Port J17 Real Time Clock RTC Oops Jumper BIOS Recovery User GPIO signals J2 Temperature Monitoring Serial Console Watchdog timer Power Interface J4 J6 NOTE Ampro Computers Inc only supports the features options tested and listed in this manual The main integrated circuits chips used in the ReadyBoard 700 m...

Page 26: ...33MHz FSB The Pentium III processor requires a heatsink but no fan Memory The ReadyBoard 700 memory consists of the following elements SDRAM SODIMM Flash memory SDRAM Memory DIMM1 The ReadyBoard 700 supports a single standard 144 pin SODIMM socket SODIMM socket can support up to 512MB of memory Operating at 133MHz 7 5ns 3 3V SDRAM NOTE Ampro recommends using only PC 133 133MHz 3 3V 7 5ns 144 pin S...

Page 27: ...e X PCI INTA Automatically Assigned PCI INTB Automatically Assigned PCI INTC Automatically Assigned PCI INTD Automatically Assigned Sound Blaster D O O O USB Automatically Assigned VGA Automatically Assigned Ethernet Automatically Assigned Legend D Default O Optional X Fixed NOTE The IRQs for the Ethernet Video and Internal Local Bus ISA are automatically assigned by the BIOS Plug and Play logic L...

Page 28: ...ess hex Subsystem 000 00F Primary DMA Controller 020 021 Master interrupt Controller 040 043 Programmable Interrupt Timer Clock Timer 060 06F Keyboard Controller 070 07F CMOS RAM NMI Mask Reg RT Clock 080 09F DMA Page Registers 092 Fast A20 gate and CPU reset 094 Motherboard enable 102 Video subsystem register 0A0 0BF Slave Interrupt Controller 0C0 0DF Slave DMA Controller 2 0F0 0FF Math Coprocess...

Page 29: ...ess cycle the command is defined and during the data cycle the byte enable is defined 5 A5 GND Digital Ground 6 A6 AD11 T S PCI Address and Data Bus Line 11 Refer to Pin 3 for more information 7 A7 AD14 T S PCI Address and Data Bus Line 14 Refer to Pin 3 for more information 8 A8 3 3V 3 3 volt power supply 5 9 A9 SERR O D System Error This signal is for reporting address parity errors 10 A10 GND D...

Page 30: ...nnected Reserved 31 B1 NC Not connected Reserved 32 B2 AD02 T S PCI Address and Data Bus Line 2 Refer to Pin 3 for more information 33 B3 GND Digital Ground 34 B4 AD07 T S PCI Address and Data Bus Line 7 Refer to Pin 3 for more information 35 B5 AD09 T S PCI Address and Data Bus Line 9 Refer to Pin 3 for more information 36 B6 VI O 5 volt power supply 5 37 B7 AD13 T S PCI Address and Data Bus Line...

Page 31: ...TA O D Interrupt A This signal is used to request an interrupt 60 B30 NC Not connected Reserved 61 C1 5 5 volt power supply 5 62 C2 AD01 T S PCI Address and Data Bus Line 1 Refer to Pin 3 for more information 63 C3 AD04 T S PCI Address and Data Bus Lines 4 Refer to Pin 3 for more information 64 C4 GND Digital Ground 65 C5 AD08 T S PCI Address and Data Bus Line 8 Refer to Pin 3 for more information...

Page 32: ... B This signal is used to request interrupts only for multi function devices 90 C30 PME Power Management Event This signal is used for power management events 91 D1 AD00 T S PCI Address and Data Bus Line 0 Refer to Pin 3 for more information 92 D2 5V 5 volt power supply 5 93 D3 AD03 T S PCI Address and Data Bus Lines 3 Refer to Pin 3 for more information 94 D4 AD06 T S PCI Address and Data Bus Lin...

Page 33: ...to Pin 27 for more information 117 D27 GND Digital Ground 118 D28 RST In PCI bus reset This signal is an output signal to reset the entire PCI Bus This signal will be asserted during system reset 119 D29 INTC O D Interrupt C This signal is used to request interrupts only for multi function devices 120 D30 GND Digital Ground Notes The shaded area denotes power or ground The signals marked with Nega...

Page 34: ...ctive low not ready to insert wait states Devices using this signal to insert wait states should drive it low immediately after detecting a valid address decode and an active read or write command The signal is released high when the device is ready to complete the cycle 11 A11 AEN Address Enable This signal is used to degate the system processor and other devices from the bus during DMA transfers...

Page 35: ...e Must be held high until associated DACK2 line is active 39 B7 12V Not connected 12 volts 40 B8 ENDXFR Zero Wait State This signal is driven low by a bus slave device to indicate it is capable of performing a bus cycle without inserting any additional wait states To perform a 16 bit memory cycle without wait states this signal is derived from an address decode 41 B9 12V 12 Volts 42 B10 GND Not co...

Page 36: ...ng interrupt request Only one device may use the request line at a time 57 B25 IRQ3 Interrupt Request 3 Asserted by a device when it has pending interrupt request Only one device may use the request line at a time 58 B26 DACK2 DMA Acknowledge 2 Used by DMA controller to select the I O resource requesting the bus or to request ownership of the bus as a bus master device Can also be used by the ISA ...

Page 37: ...The signals marked with Negative true logic Table 3 8 PC 104 Interface Pin Signal Descriptions J14D Pin Signal Descriptions J14 Row D 21 D0 GND Ground 22 D1 MEMCS16 Memory Chip Select 16 This is signal is driven low by a memory slave device to indicates it is cable of performing a 16 bit memory data transfer This signal is driven from a decode of the LA23 to LA17 address lines 23 D2 IOCS16 I O Chi...

Page 38: ...ed by I O resources to request DMA service Must be held high until associated DACK6 line is active 35 D14 DACK7 DMA Acknowledge 7 Used by DMA controller to select the I O resource requesting the bus or to request ownership of the bus as a bus master device Can also be used by the ISA bus master to gain control of the bus from the DMA controller 36 D15 DRQ7 DMA Request 7 Used by I O resources to re...

Page 39: ...a 9 These signals 0 to 15 provide the disk data signals 7 PDD5 Primary Disk Data 5 These signals 0 to 15 provide the disk data signals 8 PDD10 Primary Disk Data 10 These signals 0 to 15 provide the disk data signals 9 PDD4 Primary Disk Data 4 These signals 0 to 15 provide the disk data signals 10 PDD11 Primary Disk Data 11 These signals 0 to 15 provide the disk data signals 11 PDD3 Primary Disk Da...

Page 40: ...lable Used in response to DMARQ asserted 30 GND Digital Ground 31 IRQ14 Interrupt Request 14 Asserted by drive when it has pending interrupt PIO transfer of data to or from the drive to the host 32 NC Not connected IOCS16 33 PDA1 Primary IDE ATA Disk Address 0 to 2 Used to indicate which byte in the ATA command block or control block is being accessed 34 PD33 66 UDMA 33 66 Sense Senses which DMA m...

Page 41: ...using D0 D15 to provide the disk data signals 3 SDD4 Secondary Disk Data 4 Refer to SDD3 on pin 2 for more information 4 SDD5 Secondary Disk Data 5 Refer to SDD3 on pin 2 for more information 5 SDD6 Secondary Disk Data 6 Refer to SDD3 on pin 2 for more information 6 SDD7 Secondary Disk Data 7 Refer to SDD3 on pin 2 for more information 7 SDCS1 Secondary Chip Select 1 This signal along with CE2 is ...

Page 42: ... the signal trailing edge 36 VCC 5 volts 5 37 IRQ15 Interrupt Request 15 IRQ 15 is asserted by drive CF when it has a pending interrupt PIO transfer of data to or from the drive to the host 38 VCC 5 volts 5 39 MASTER Master Slave This signal is determined by jumper JP4 and is used to configure this device as a Master or a Slave When this pin is grounded jumper inserted this device is configured as...

Page 43: ... port data signals Index Sense detects the head is positioned over the beginning of a track 3 PD1 TRK0 Parallel Port Data 1 This pin 0 to 7 provides parallel port data signals Track 0 Sensing detects the head is positioned over track 0 4 PD2 WPRT Parallel Port Data 2 This pin 0 to 7 provides parallel port data signals Write Protect Senses the diskette is write protected 5 PD3 RDATA Parallel Port D...

Page 44: ... Select Selects side for Read Write operations 0 side 1 1 side 0 16 PINIT DIR Printer Initialize This signal used to Initialize printer Output in standard mode I O in ECP EPP mode Direction Head movement direction 0 inward motion 1 outward motion 17 PTSLCT WGATE Printer Select This is a status output signal from the printer A High State indicates it is selected and powered on Write Gate Signal to ...

Page 45: ...ngs screen for Serial ports 3 COM3 and 4 COM4 However the RS232 mode is the default Standard for any serial port RS485 mode termination is selected with jumper JP6 pins 1 2 COM3 and pins 3 4 COM4 when the RS485 mode is selected in BIOS Setup To implement the two wire RS485 mode on either serial port you must tie the equivalent pins together for each port For example on Serial Port 3 tie pin 3 RX3 ...

Page 46: ...ions to answer and open the communications channel Notes The shaded area denotes power or ground The signals marked with Negative true logic Table 3 13 Serial A Serial 2 Interface Pin Signal Descriptions J5B Pin Signal Description 1 DCD2 Data Carrier Detect 2 Indicates external serial communications device is detecting a carrier signal i e a communication channel is currently open In direct connec...

Page 47: ...are handshake with RTS3 for low level flow control RX3 If in RS485 or RS422 mode this pin is Receive Data 3 A7 4 DTR3 Data Terminal Ready 3 iIndicates Serial port 3 is powered initialized and ready Used as hardware handshake with DSR3 for overall readiness to communicate A8 9 RI3 Ring Indicator 3 Indicates external modem is detecting a ring condition Used by software to initiate operations to answ...

Page 48: ...flow control RX4 If in RS485 or RS422 mode this pin is Receive Data 4 B17 4 DTR4 Data Terminal Ready 4 Indicator Serial port 4 is powered initialized and ready Used as hardware handshake with DSR4 for overall readiness to communicate B18 9 NC Not connected B19 5 GND Ground B20 NC NC Not connected Notes The shaded area denotes power or ground RS232 signals are listed first followed by RS485 RS422 T...

Page 49: ... Table 2 4 Primary USB0 and USB1 J15A B Table 3 15 USB 1 2 Interface Pin Signal Descriptions J15 B Pin Signal Description 1 5V 5V through a fuse F1 2 USBP0 Universal Serial Bus Port 0 Data Negative 3 USBP0 Universal Serial Bus Port 0 Data Positive 4 GND Goes to ground thorough a choke 5 5V 5V 5 through a fuse F3 6 USBP1 Universal Serial Bus Port 1 Data Negative 7 USBP1 Universal Serial Bus Port 1 ...

Page 50: ...terframe spacing IFS IEEE 802 3u Auto Negotiation support 3kB transmit and 3kB receive FIFOs helps prevent data underflow and overflow IEEE 802 3x 100BASE TX flow control support Improved dynamic transmit chaining with multiple priorities transmit queues Each Ethernet port has a RJ 45 connector and the related magnetics integrated on the board Each Ethernet port controller connected to Primary PCI...

Page 51: ...C686B and the ion board Audio CODEC VT1612A These two chips communicate through a digital interface defined by and compliant with AC 97 Rev 2 2 Input or output signals for the audio interface go through the 16 pin connector J19 to an external cable and or board which has the respective audio connections The PC Beep Speaker signal from the Southbridge is also fed to the on board Audio CODEC to prov...

Page 52: ...J8 Table 3 20 CRT Interface Pin Signal Descriptions J8 Pin Signal Description 1 RED Red This is the Red analog output signal to the CRT 2 GREEN Green This is the Green analog output signal to the CRT 3 BLUE Blue This is the Blue analog output signal to the CRT 4 NC Not connected 5 GND Digital Ground 6 GND Digital Ground 7 GND Digital Ground 8 GND Digital Ground 9 NC Not connected 10 GND Digital Gr...

Page 53: ...n 2 for more information 17 FP16 Flat Panel Data Output 16 Refer to pin 2 for more information 18 FP20 Flat Panel Data Output 20 Refer to pin 2 for more information 19 FP17 Flat Panel Data Output 17 Refer to pin 2 for more information 20 FP18 Flat Panel Data Output 18 Refer to pin 2 for more information 21 FP19 Flat Panel Data Output 19 Refer to pin 2 for more information 22 FP14 Flat Panel Data O...

Page 54: ... bus or ISA bus Notes The shaded area denotes power or ground LVDS Interface J7 Table 3 22 LVDS Interface Pin Signal Descriptions J7 Pin Signal Description Line Channel 1 3 3V_Panel 3 3V source 2 5V_Panel 5V source 3 GND Ground 4 GND Ground NA NA 5 LVDS_Y0M Data Negative Output 6 LVDS_Y0P Data Positive Output 0 7 LVDS_Y1M Data Negative Output 8 LVDS_Y1P Data Positive Output 1 9 LVDS_Y2M Data Negat...

Page 55: ...en pins 3 2 4 5V 5 Volts 5 BUZZG PC Beep Speaker Output connect between pins 5 4 Notes The shaded area denotes power or ground Reset Switch SW1 The reset switch SW1 located on the board edge provides an internal reset signal momentary ground to the ReadyBoard 700 The reset switch SW1 shares the reset signal line with pin 3 of the Utility interface J18 Keyboard Mouse Interface J16 The PS 2 Keyboard...

Page 56: ...b site and referenced earlier in this manual For more information refer to the VIA VT82C686B chip databook and the Infrared Data Association web site at http www irda org NOTE For faster speeds and infrared applications not covered in this brief description refer to the VT82C686B chip specifications by VIA Technologies Inc Table 3 25 Infrared Interface Pin Signal Descriptions J17 Pin Signal Descri...

Page 57: ...bond_products pdfs PCIC 877tf pdf Table 3 26 User GPIO Signals Pin Signal Descriptions J2 Pin Signal Description 1 GND Ground 2 5V 5 VDC 3 GPIO0 User defined 4 GPIO1 User defined 5 GPIO2 User defined 6 GPIO3 User defined 7 GPIO4 User defined 8 GPIO5 User defined 9 GPIO6 User defined 10 GPIO7 User defined Notes The shaded area denotes power or ground Temperature Monitoring The Southbridge VIA VT82C...

Page 58: ...ring the boot process and during normal system operation During the Boot process If the operating system fails to boot in the time interval set in the BIOS the system will reset Enable the WDT in the Advanced BIOS Features of BIOS Setup Set the WDT for a time out interval in seconds between 2 and 255 in one second increments in the Advanced BIOS Features screen Ensure you allow enough time for the...

Page 59: ...ff soft off by the ReadyBoard If you use a non ATX power supply lab supply or AT power supply you must connect J6 pin 1 to 5V from the power interface connector J4 to enable the ReadyBoard 700 to power on completely However if you use a non ATX power supply you won t have the soft off feature normally provided by ATX power supplies Table 3 28 Power On Header Pin Signal Descriptions J6 Pin Signal D...

Page 60: ...Chapter 3 Hardware 54 Reference Manual ReadyBoard 700 ...

Page 61: ...and can be accessed when prompted using the Del key while the board is in the Power On Self Test POST state just before completing the boot process The screen displays a message indicating when you can press Del to enter the BIOS Setup Utility The ReadyBoard 700 BIOS Setup is used to configure items in the BIOS using the following menus BIOS and Hardware Settings Reload Initial Settings Load Facto...

Page 62: ...0 4 Start Setup by pressing the Ctl c keys when the following message appears on the boot screen Hit C if you want to run SETUP 5 Use the Enter key to select the screen menus listed in the Opening BIOS screen See Figure 4 1 NOTE The serial console port is not hardware protected and is not listed in the COM table within BIOS Setup Diagnostic software that probes hardware addresses may cause a loss ...

Page 63: ... use Enter to select menu item C Copyright 2004 Ampro Computers Inc http www ampro com Help for BIOS and Hardware Settings Figure 4 1 Opening BIOS Screen NOTE For the most current BIOS Information refer to the Hardware Release Notes provided as hard copy in the shipping container NOTE The default values or the typical settings are shown highlighted bold text in the list of options on the following...

Page 64: ... of the year indicating the century plus year 08 Oct 2004 Time hh mm ss This requires 24 hour Clock setting in hours minutes and seconds Drive Assignments Drive A none 360kB 5 25 1 2MB 5 25 720kB 3 5 1 44MB 3 5 2 88MB 3 5 or USB Floppy NOTE If USB Boot Support is Disabled the USB Floppy selections are invalid and Drive B must be set to none See Table 4 2 Floppy Drive Setting Drive B none 360kB 5 2...

Page 65: ...hat emulates a hard disk drive can be used when USB HDD is set as the drive option This includes various storage media types such as USB hard disk drives USB CD ROMs CompactFlash cards and Flash or Thumb drives Refer also to Boot Order settings USB Boot Support under Advanced features and USB device enable under On Board Controllers for USB Drive boot order USB Boot Enable and the number of USB po...

Page 66: ...ot directory of each boot device Primary IDE Cable Auto 40 Wire or 80 Wire Setting these fields to Auto causes the BIOS to query the attached IDE device to determine the type of IDE cable used If the BIOS detects 40 wire or you select it the BIOS will not use UDMA 66 or faster mode when sending signals to from the IDE device Secondary IDE Cable Auto 40 Wire or 80 Wire Secondary Master ATA mode LBA...

Page 67: ... indicating when an error has occurred during POST power on self test and wait for you to respond by hitting the F1 key If Disabled and an error occurs during POST the BIOS will attempt to continue the boot process Config Box Disabled or Enabled This field if Enabled displays the Configuration Summary Box which list all of the configuration information for the system at the completion of POST but ...

Page 68: ...nd force the SDRAM clock to 100MHz NOTE The SDRAM clock frequency can never be set higher than the CPU s Front Side Bus FSB clock frequency regardless of the SPD or PC100 setting DRAM CAS Latency SPD CAS 3 or CAS 2 This field specifies the DRAM CAS Column Address Strobe Latency If this field is set to SPD then the DRAM CAS latency is set using the information read from the SPD s on the DRAM module...

Page 69: ...ected to Serial 1 or 2 Use the modified serial cable described in Chapter 3 under Hot Serial Cable USB Boot Support Disabled or Enabled This field allows you to select any USB device as a boot device Refer also to Drive Assignment settings Boot Order settings and USB device enable under On Board Controllers for the USB Drive settings and the number of USB ports enabled respectively If this field i...

Page 70: ...he port is not used then no IRQ is assigned making it available for other devices IRQ 3 4 5 7 9 10 or 11 This field specifies the IRQ used for Serial Port 3 Mode RS 232 or RS 485 This field specifies the signal mode RS232 or RS485 used for Serial Port 3 If RS 485 mode is selected the RTS signal should be used to control the direction for this port transmit or receive Serial 4 Disabled 3F8h 2F8h 3E...

Page 71: ...is field is set to 4 Ports both on board USB controllers are used each one supporting two USB ports If this field is set to 2 Ports the first on board USB controller is used supporting two USB ports and the second on board USB controller is disabled Audio Disabled or Enabled If this field is set to Enabled the on board Audio controller is used On Board Video Framebuffer Size Disabled 8MB 16MB or 3...

Page 72: ... or 280 28Fh This field indicates the base address of the on board Audio controller used to emulate the SoundBlaster or is disabled IRQ 5 7 9 or 10 If the SoundBlaster emulation is Disabled then no IRQ is used DMA 3 2 1 or 0 If the SoundBlaster emulation is Disabled then no DMA channel is used MPU 401 Midi Disabled 300 303h 310 313h 320 323h or 330 333h This field indicates the base address of the...

Page 73: ... to Disabled Assign IRQ 5 Disabled or Enabled If this field is set to Enabled then the BIOS can assign this IRQ to a Plug and Play adapter If another device in the system is using this IRQ then this field should be set to Disabled Assign IRQ 6 Disabled or Enabled Typically Floppy Disk If this field is set to Enabled then the BIOS can assign this IRQ to a Plug and Play adapter If another device in ...

Page 74: ...e BIOS can assign this IRQ to a Plug and Play adapter If another device in the system is using this IRQ then this field should be set to Disabled Assign DMA 0 Disabled or Enabled If this field is set to Enabled then the BIOS can assign this DMA channel to a Plug and Play adapter If another device in the system is using this DMA channel then this field should be set to Disabled Assign DMA 1 Disable...

Page 75: ...to Disabled Assign DMA 6 Disabled or Enabled If this field is set to Enabled then the BIOS can assign this DMA channel to a Plug and Play adapter If another device in the system is using this DMA channel then this field should be set to Disabled Assign DMA 7 Disabled or Enabled If this field is set to Enabled then the BIOS can assign this DMA channel to a Plug and Play adapter If another device in...

Page 76: ... screen image supported by the ReadyBoard 700 BIOS should be Bitmap image Exactly 640x480 pixels Exactly 16 colors A converted file size of not greater than 55kB Converting the Splash Screen File The following files are provided by Ampro on the ReadyBoard 700 Doc SW CD ROM and are required for converting a custom splash screen file Refer to the CD ROM for the utilities and an example of how to loa...

Page 77: ...le is not approximately 153 718 bytes in size it is probably not in the right format or is too complex to be used in the BIOS You will have to edit it down in size until you have reached an acceptable file size If you are doubtful about the conversion process due to the file size Ampro recommends making a copy of your new splash bmp so that you can edit it later if the conversion does not yield a ...

Page 78: ...Chapter 4 BIOS Setup 72 Reference Manual ReadyBoard 700 ...

Page 79: ...stance by going to the Ask a Question area in the Virtual Technician Requests can be submitted 24 hours a day 7 days a week You will receive immediate confirmation that your request has been entered Once you have submitted your request you can go to the My Stuff area and log in to check status update your request and access other features Embedded Design Resource Center This service is also free a...

Page 80: ...Appendix A Technical Support 74 Reference Manual ReadyBoard 700 ...

Page 81: ...t up to detect new devices and install software automatically thereby greatly simplifying the management of small to large numbers of systems attached to a network If the hard disk drive should crash the network can be set up to do a hardware diagnostic check and once a software related problem is detected the server can re install the defective software or all the ReadyBoard software from the ser...

Page 82: ...oot Execution Environment PXE Accessing PXE Boot Agent BIOS Setup To access PXE Boot Agent BIOS Setup when LAN Boot has been selected in the ReadyBoard 700 BIOS Setup screen refer to this procedure 1 Reboot the ReadyBoard 700 after selecting LAN 1 or LAN 2 in BIOS Setup and saving changes The default setting for LAN Boot is None 2 Access the LAN Boot Setup by pressing the Ctrl Alt B keys when the ...

Page 83: ...or timeout Boot Failure Next boot device Figure B 1 PXE Agent Boot Setup Screen PXE Configuration Boot Method PXE TCP IP NetWare or RPL Default Boot Local or Network Local Boot Disabled or Enabled Config Message Disabled or Enabled Message Timeout 3 seconds 6 seconds 12 seconds or Forever Boot Failure Prompt Wait for timeout or Wait for key Boot Failure Next boot device or Reboot TCP IP Configurat...

Page 84: ...ssage Timeout 3 seconds 6 seconds 12 seconds or Forever Boot Failure Prompt Wait for timeout or Wait for key Boot Failure Next boot device or Reboot RPL Configuration Boot Method PXE TCP IP NetWare or RPL Default Boot Local or Network Local Boot Disabled or Enabled Config Message Disabled or Enabled Message Timeout 3 seconds 6 seconds 12 seconds or Forever Boot Failure Prompt Wait for timeout or W...

Page 85: ...d disk drive 58 LAN boot 75 USB boot Disabled as default 63 boot search no bootable device available 60 CD ROM ReadyBoard 700 Doc SW 2 CompactFlash always use HDD CF Sec Master Slave 58 ATA format selection 60 connector pin outs 35 connectors connector list 11 console redirection Hot cable 52 serial console 51 features 51 63 CPU heatsinks requirements 17 customer defined splash screen 70 dimension...

Page 86: ...k diagram 9 Celeron CPU 6 connectors 11 dimensions 16 Doc SW CD ROM 2 EPIC Architecture 5 Ethernet features 44 feature list 6 floppy disk drive features 37 floppy drive configurations 59 GPIO feature 51 IDE features 33 input power 53 LAN boot optional feature 63 75 major integrated circuits 10 parallel port features 37 Pentium III CPU 6 pin 1 locations 12 13 power on connector J6 53 power requirem...

Page 87: ...fuse 1 8 PS 2 mouse interface 8 49 Real time clock RTC 8 50 RS485 RS422 configuration 39 serial console 8 51 serial ports 4 7 39 splash screen customization 70 thermal sensor 8 51 USB boot device 58 59 63 USB ports 4 7 43 video interfaces 3 8 46 voltage sensor 8 watchdog timer WDT 8 52 63 table notes PC 104 Plus input and output codes 27 terminal emulation software console redirection 51 serial co...

Page 88: ...Index 82 Reference Manual ReadyBoard 700 ...

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