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AMD SP5100 Databook
44409 Rev. 1.70 October 10
38
Signal Description
Pin Name
Type
Voltage
Functional Description
TEMPIN3*/TALERT#/
GPIO64
I/O
S5_3.3V
Temperature Monitor Input 3* / Temperature has
reached cautionary state / GPIO 64
VIN0/GPIO53
I/O
3.3 V
Voltage Monitor Input 0 / GPIO 53
VIN1/GPIO54
I/O
3.3 V
Voltage Monitor Input 1 / GPIO 54
VIN2/GPIO55
I/O
3.3 V
Voltage Monitor Input 2 / GPIO 55
VIN3/GPIO56
I/O
3.3 V
Voltage Monitor Input 3 / GPIO 56
VIN4/GPIO57
I/O
3.3 V
Voltage Monitor Input 4 / GPIO 57
VIN5/GPIO58
I/O
3.3 V
Voltage Monitor Input 5 / GPIO 58
VIN6/GPIO59
I/O
3.3 V
Voltage Monitor Input 6 / GPIO 59
VIN7/GPIO60
I/O
3.3 V
Voltage Monitor Input 7 / GPIO 60
AVDD
-
3.3 V (Analog Power)
Hardware Monitor Analog PWR
AVSS
-
Analog Ground
Hardware Monitor Analog GND
*
Note:
Temperature
monitoring function is NOT supported on the SP5100. TEMPIN[3:0] can only be
used as GPIOs.
7.11 SPI ROM Interface
SPI ROM is supported up to 33 MHz. Maximum ROM size supported is 16 MB. Burst read and fast read
cycles are not supported.
Pin Name
Type
Voltage
Functional Description
SPI_DI/GPIO12
I/O
S5_3.3V
SPI Data In / GPIO 12
SPI_DO/GPIO11
I/O
S5_3.3V
SPI Data Output / GPIO 11
SPI_CLK/GPIO47
I/O
S5_3.3V
SPI Clock / GPIO 47
SPI_HOLD#/GPIO31
I/O
S5_3.3V
SPI HOLD# / GPIO 31
SPI_CS1#/GPIO32
I/O
S5_3.3V
SPI Chip Select# / GPIO 32
SPI_CS2#/IMC_GPIO2
I/O
S5_3.3V
Alternate SPI chip select#/IMC GPIO 2
7.12 Northbridge / Power Management Interface
Pin Name
Type
Voltage
Functional Description
LPC_PME#/
GEVENT3#
I/O
S5_3.3V
LPC PME# Input / General Event 3
LPC_SMI#/
EXTEVNT1#
I/O
3.3 V
(5-V tolerance)
LPC SMI# Input / External Event 1
PCI_PME#/
GEVENT4#
I/O
S5_3.3V
PCI PME# Input / General Event 4
PWR_BTN#
I
S5_3.3V
Power Button: The Power Button will cause an SMI# or SCI to
indicate a system request to go to a sleep state. If the system is
already in a sleep state, this signal will cause a wake event. If
PWRBTN# is pressed for more than 4 seconds, this will cause an
unconditional transition (power button override) to the S5 state with
only the PWRBTN# available as a wake event. Override will occur
even if the system is in the S1 state. This signal has an internal pull-
up resistor.