Universal Serial Bus (USB)
Am186™CC/CH/CU Microcontrollers User’s Manual
18-19
For a transmit endpoint (IN direction), the ACT_REQ bit is set if the FIFO is ready to be
filled with data. If this bit is set, software can fill the FIFO when it has data for that endpoint
to transmit, then it must clear the ACT_REQ bit to release the FIFO.
If an error occurs on a packet received by a bulk, control, or interrupt endpoint, the ACT_REQ
bit is not set. Instead, the FIFO is flushed, and the host retransmits the packet. If an error
occurs when the endpoint being addressed is isochronous, no retransmission can occur;
the data that was sent or received must be used as is.
18.5.5
Interrupt-Driven I/O
A single interrupt channel can be configured to alert software that the USB peripheral
controller requires attention. Interrupt mask fields allow the device software to enable the
events it is interested in, and the status registers show which events have occurred.
The interrupt mode of operation is very similar to the polled mode. It is an extension of the
polled mode in which the ACT_REQ bit is enabled to cause an interrupt. The device
software’s interrupt handler then polls the status bits to see which endpoint needs service.
Errors that occur in this mode are handled the same as in polled mode.
18.5.6
Using USB with DMA
Compared with polled or interrupt I/O, using DMA with USB gives the following benefits:
■
Improved Throughput: This is an important consideration, not only from the
microcontroller's perspective, but also from the USB host's perspective. If the
microcontroller is ready to receive or transmit data whenever the host wishes, it reduces
USB bus overhead due to retries.
■
Larger Packets: When the USB peripheral controller is used with DMA, there is no
restriction on packet size, other than that mandated by the USB specification (1023
bytes/packet for isochronous, 64 bytes/packet for bulk). When DMA is not used, packets
are restricted to the size of the endpoints' FIFO.
■
Automatic Rate Control: The microcontroller's Automatic Rate Control feature is only
available when using DMA. This feature allows the amount of data sent in an isochronous
IN packet to be controlled by the number of PCM highway frames or other external events
that occur in each USB frame.
However, using DMA with USB is more complicated than using polled or interrupt I/O. In
Polled or Interrupt mode, the USB hardware performs all error handling itself. The host is
notified only when a packet has been received or transmitted without errors. With DMA,
software is responsible for recovering from errors. This includes backing up DMA pointers,
taking into account the amount of data that has not yet been transferred to or from the
endpoint's FIFO, and so on. In addition, using DMA requires extra programming effort even
before exception handling is considered.
18.5.6.1
DMA Availability
DMA mode is only available for Endpoints A–D. In DMA mode, endpoints are programmed
to use the microcontroller’s general-purpose DMA or SmartDMA channels.
When used with a USB data endpoint, the general-purpose DMA channels allow the device
software to set up a single USB packet or an entire I/O request packet (IRP) to transfer
data automatically between memory and the endpoint’s FIFO. During the transfer, software
interaction is required only to handle FIFO and USB packet errors.
SmartDMA channel pairs 2 and 3 can be used with specific endpoints if they are configured
in the correct direction, as shown in Table 18-4. SmartDMA channels allow device software
to set up single or multiple USB packets, or single or multiple IRPs, to be moved
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...