Universal Serial Bus (USB)
Am186™CC/CH/CU Microcontrollers User’s Manual
18-15
5. Device software can clear the NOT_FLUSH bit in the AEPCTL register if it needs to
update stale data in the FIFO before the data is transmitted. This causes the USB
hardware to return control to software by setting the ACT_REQ bit. However, the
ACT_REQ bit is set only if there is no active data transfer from this endpoint to the host.
Device software can verify if the ACT_REQ bit is set and if it is, can update stale data
by writing to the FIFO (AEPDAT).
18.5.1.4.3
Endpoint C Configured as Bulk OUT, General-Purpose DMA Mode
1. Program the endpoint C registers:
– Set EP_TYPE = 10b (Bulk) and EP_DIR = 1 (OUT) in the CEPDEF1 register.
– Set MODE = 010b or 011b (general-purpose DMA) in the CEPDEF3 register. These
modes behave the same when used for an OUT endpoint.
– Set the appropriate interrupt mask bits in the UIMASK1 or UIMASK2 register. For
general-purpose DMA operation, enable the appropriate interrupt mask bits in the
CEPDEF3 register to allow the device software to be notified of the FIFO status. For
example, the FULL_PKT, SHORT_PKT, OTHER_ERROR, or BUFFER_ERROR
status bits could stop the hardware, requiring device software to take appropriate
action and then clear the ACT_REQ bit to let the hardware continue.
– Perform any additional programming of the definition registers that is required for the
specific application.
2. In the General-Purpose DMA Control 0 (GDxCON0) register for an available general-
purpose DMA channel, set DSEL = 11100b (USB Endpoint C, source-synchronized).
Make any other DMA channel configuration settings that are required, then set ST = 1
in the GDxCON0 register to enable the DMA channel. Enable the DMA channel before
enabling the DMA request source to avoid data loss or initial error conditions.
It is important to note that in DMA mode, the ACT_REQ bit no longer serves as a
semaphore lock for the data FIFO. The data FIFO now behaves as a circular FIFO with
simultaneous read/write capability. The ACT_REQ bit acts as a Stop/Go bit for the
hardware. For details, see the xEPCTL register description in the
Am186™CC/CH/CU
Microcontrollers Register Set Manual, order #21916. If software sets the endpoint’s
ACT_REQ bit, the DMA transfer stops until software clears the bit again.
18.5.1.4.4
Endpoint C Configured as Bulk IN, General-Purpose DMA Mode with Terminal
Count Not Ignored
1. Program the Endpoint C registers:
– Set EP_TYPE = 10b (Bulk) and EP_DIR = 0 (IN) in the CEPDEF1 register.
– Set MODE = 011b (general-purpose DMA, terminal count not ignored) in the
CEPDEF3 register.
In this mode, when the terminal count for the general-purpose DMA channel reaches
zero, the byte of data written is marked as the last byte in the USB endpoint FIFO. If
the transfer size is an integer multiple of the maximum packet size, device software
can write a zero byte to the endpoint FIFO by clearing the NOT_ZERO bit in the
CEPCTL register and following that with a dummy write to the CEPDAT register. The
NOT_ZERO bit is set automatically when the data port is written.
– Set the appropriate interrupt mask bits in UIMASK1 or UIMASK2. For general-purpose
DMA operation, enable the appropriate interrupt mask bits in the CEPDEF3 register
to allow the device software to be notified of the FIFO status. For example, the
FULL_PKT, SHORT_PKT, OTHER_ERROR, or BUFFER_ERROR status bits could
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...