General Circuit Interface (GCI)
17-16
Am186™CC/CH/CU Microcontrollers User’s Manual
17.5.7.5
TIC Bus Support
The meaning of each bit within the TIC bus is dependent on whether the Am186CC
microcontroller is transmitting or receiving on the TIC bus. Table 17-5 lists and describes
the TIC bus bits.
In the downstream direction (from the transceiver), the TIC bus on GCI Subframe 2 is used
for D and C/I0 channel access control in S/T interface terminals.
The TIC bus downstream has the format shown in Figure 17-8.
Figure 17-8
TIC Bus Downstream Format
The availability of the S/T interface D-channel is indicated in bit 5 (Stop/Go bit) of the
downstream TIC bus. The Am186CC microcontroller GCI TIC bus controller checks the
Stop/Go bit to determine if it has access to the D-channel. If it does, it can start transmission
of an HDLC frame. If the TIC bus controller does not have access, it must halt the
transmission. Bits 7 and 6 are the D-channel Echo bits from the S-interface (reflecting back
the two D-channel bits of the current frame). The Am186CC microcontroller GCI TIC bus
controller compares the Echo bits with the sent D-channel bits to determine if a collision
has occurred. A D-channel collision is reported to an HDLC through an internal signal,
originating from the GCI TIC bus controller, whose function is similar to an external CTS
deassertion (a mechanism that stops HDLC transmission). The Am186CC microcontroller
does not use the A/B bit.
In the upstream direction (to the transceiver), the TIC bus on GCI Channel 2 is used for the
TIC bus access procedure, enabling the connection of several Layer 2 D-channel protocol
controllers to the GCI interface.
The TIC bus upstream has the format shown in Figure 17-9.
Figure 17-9
TIC Bus Upstream Format
Table 17-5
TIC Bus Bits
Bit Name
Bit Function
BAC (Bus Accessed)
Indicates to the other devices that the TIC bus is being accessed. When 0, the
bus is being accessed; when 1, it is free. This bit is driven to zero by the device
that gets an address match on TBA2–TBA0.
TBA2-0 (TIC Bus Address)
Address bit used for arbitration of TIC bus control. Assumes open-drain bus
such that the device with the lowest address has the highest priority. The lowest
priority address, which is also the default, is 111.
E-bits (Echo Bits)
D-channel Echo bits from the S-interface.
S/G bit (Stop/Go)
Indicates availability of the S-interface D-channel. When 0, the D-channel is
clear for transmission. When 1, D-channel transmission should be halted.
Bit Number
7
6
5
4
3
2
1
0
Bit Name
E
E
S/G
A/B
1
1
1
1
Bit Number
7
6
5
4
3
2
1
0
Bit Name
1
1
BAC
TBA2
TBA1
TBA0
1
1
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...