DMA Controller
Am186™CC/CH/CU Microcontrollers User’s Manual
8-37
Figure 8-8
SmartDMA Transmit Channel Flow Diagram
8.5.7.5.2
SmartDMA Receive Channel Cycle
The flow diagram for the SmartDMA receive channel is shown graphically in Figure 8-9 on
page 8-38 and discussed below.
1. When the receive channel is first enabled, the SmartDMA controller enters Initialization
mode.
2. The receive channel fetches the data for the first descriptor in the receive descriptor ring
and checks to see if the owner semaphore (OWN) bit is set to 1.
If the OWN bit is 0, the software owns the current descriptor. In this case, the SmartDMA
receive channel periodically polls the descriptor until the OWN bit becomes 1. The
receive channel does not advance past a descriptor for which the OWN bit is 0. For
information about forcing a poll, see “SmartDMA Channel Descriptor Polling” on
page 8-41.
3. If the OWN bit is 1 in the current descriptor, the SmartDMA controller loads the address
of the buffer into an internal receive address register. The length of the buffer is also
read from the descriptor and programmed into an internal terminal count register. The
receive channel then enters Normal-Receive mode.
4. In Receive mode, the terminal count is decremented and the destination address is
incremented for each byte transferred. The receiver remains in Normal-Receive mode
until an end-of-packet is detected or the terminal count is reached.
Initialize channel
Transmit data
Get next buffer
Signal end of
Search for
start-of-packet
OWN=1
OWN=0
OWN=1
STP=1
STP=0
ENP=0
ENP=1
transmit
Search for
available buffer
OWN=1
OWN=1
(TC=0)
(TC=0)
(TC>0)
Transmit byte
and decrement
count
Notes:
The TC bit is internal and not seen by users.
Owner semaphore bit set
and not start-of-packet
Owner semaphore bit not set
Owner semaphore bit set
Owner semaphore
bit set and
start-of-packet
Clear owner
semaphore bit
and advance to
next descriptor
Terminal count and
not end-of-packet
Owner
semaphore
bit set
Terminal
count and
end-of-packet
Wait for packet
to be sent
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...