2–6
Altera Corporation
USB-Blaster Download Cable User Guide
December 2004
References
References
For more information on configuration and in-system programmability
(ISP), see the following sources:
■
AN 39: IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices
AN 95: In-System Programmability in MAX Devices
AN 250: Configuring Cyclone FPGAs
■
“
Configuring Stratix II Devices”
chapter in Volume 2 of the
Stratix II
Device Handbook
■
“
Configuring Stratix and Stratix GX Devices”
chapter in the
Stratix
Device Handbook
■
“Configuring Cyclone II Devices” chapter in the
Cyclone II Handbook
■
Serial Configuration Devices Data Sheet
■
“Programming & Configuration” chapter in the
Introduction to
Quartus II
manual
■
The Programming module of the Quartus II online tutorial
■
Refer to the following glossary definitions in the Quartus II Help:
●
“USB-Blaster Cable” (general description)
●
“Configuration scheme” (general description)
●
“Programming files” (general description)
■
Refer to the following procedures in the Quartus II Help:
●
Programming a Single Device or Multiple Devices in JTAG or
Passive Serial Mode
●
Programming a Single Device in Active Serial Programming
Mode
■
Refer to the following introduction and overview topics in the
Quartus II Help:
●
Programmer Introduction
●
Overview: Working with Chain Description Files
●
Overview: Converting Programming Files
