Altera Corporation
Reference Manual
2–5
May 2007
Nios Development Board Stratix II Edition
Board Components
Individual LEDs
(D0 - D7)
This Nios II development board provides eight individual LEDs
connected to the FPGA. Refer to
“Push-Button Switches (SW0 - SW3)” on
page 2–4
. D0 – D7 are connected to general purpose I/O pins on the
FPGA as shown in
Table 2–4
. When a pin drives logic 0, the
corresponding LED turns on.
Seven-Segment
LEDs (U8 & U9)
U8 and U9 connect to the FPGA, and each segment is individually
controlled by a general-purpose I/O pin. Refer to
Figure 2–3
. When a pin
drives logic 0, the corresponding U8 and U9 LED turns on. See
Table 2–5
for pin-out details.
Figure 2–3. Dual Seven-Segment Display
Table 2–4. LED Pin Table
LED
FPGA Pin
Board Net Name
D0
W15
pld_led0
D1
V14
pld_led1
D2
AD17
pld_led2
D3
AA17
pld_led3
D4
V16
pld_led4
D5
AB17
pld_led5
D6
AD18
pld_led6
D7
V17
pld_led7
U8
U9
a
b
c
d
e
f
g
dp
dp
a
b
c
d
g
e
f