ER2120QI Evaluation Board User Guide
11)
SYNC (JP3)
– For master-slave operation,
JP3 must be installed. To operate the upper
and lower devices independently, remove
JP3 and configure both devices as master
(see Master/Slave Settings).
12)
SYNC TP (TP105, TP205)
– These are the
SYNC test points for the two parts.
13)
Switching Frequency setting (R104 and
R204)
– the switching frequency of the
regulator can be programmed between
500 kHz and 1.2 MHz, as shown equations
3 and 4.
𝑅𝑅
104
=
48000
𝑓𝑓
𝑜𝑜𝑜𝑜𝑜𝑜1
(𝑘𝑘𝑘𝑘𝑘𝑘)
(3)
𝑅𝑅
204
=
48000
𝑓𝑓
𝑜𝑜𝑜𝑜𝑜𝑜2
(𝑘𝑘𝑘𝑘𝑘𝑘)
(4)
Using resistors lower than 40k
Ω
or higher
than 97k
Ω
may damage the ER2120QI and
is not recommended.
14)
Soft Start Capacitor (C107 & C207)
– The
soft start capacitor is 15nF by default. This
capacitor, along with an internal 30μA
current source, sets the soft-start interval of
the converter, t
SS
.
𝐶𝐶
𝑆𝑆𝑆𝑆
(𝜇𝜇𝜇𝜇) = 50 ∗ 𝑡𝑡
𝑆𝑆𝑆𝑆
(𝑠𝑠)
(6)
15)
Soft Start Capacitor TP (TP109 & TP209)
These are the soft-start test points.
16)
External Compensation
– The on-board
values are designed to work with a variety
of input and output voltage ranges. For
further optimization, follow the datasheet
recommendations for compensation design.
Figure 2
. VOLTAGE MODE BUCK CONVERTER
COMPENSATION DESIGN
www.altera.com/enpirion
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10605 December 23, 2014 Rev A
