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AU9331

USB Secure Digital Card Reader

Technical Reference Manual

Revision 1.2

© 1997-2002 Alcor Micro Corp.

All Rights Reserved

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Summary of Contents for AU9331

Page 1: ...AU9331 USB Secure Digital Card Reader Technical Reference Manual Revision 1 2 1997 2002 Alcor Micro Corp All Rights Reserved ...

Page 2: ...anty for the use of its products and bears no responsibility for any error that appear in this document Specifications are subject to change without prior notice Contact Information Web site http www alcormicro com Taiwan Alcor Micro Corp 4F 1 No 200 Kang Chien Rd Nei Hu Taipei Taiwan R O C Phone 886 2 8751 1984 Fax 886 2 2659 7723 Santa Clara Office Los Angeles Office 2901 Tasman Drive Suite 206 ...

Page 3: ...ference Design 7 4 1 AU9331 Block Diagram 7 4 2 Sample Schematics 8 5 0 Electrical Characteristics 9 5 1 Recommended Operating Conditions 9 5 2 General DC Characteristics 9 5 3 DC Electrical Characteristic for 3 3 volts operation 9 5 4 Crystal Oscillator Circuit Setup for Characteristics 10 5 5 ESD Test Results 11 5 6 Latch Up Test Results 12 6 0 Mechanical Information 15 ...

Page 4: ...TABLE OF CONTENTS i This page Intentionally Left Blank ...

Page 5: ...d by the Plug and Play nature built into latest operation systems such as Windows XP and MacOS X Because of the multiple sectors transfer up to 4G bytes and the single chip integration AU9331 is the most powerful and cost efficient SD reader controller solution in the market 1 2 Features Fully compliant with USB v1 1 specification and USB Device Class Definition for Mass Storage Bulk Transport v1 ...

Page 6: ...INTRODUCTION 2 This Page Intentionally Left Blank ...

Page 7: ...sh memory card reader using AU9330 By connecting the reader to a PC through USB port the AU9331 is acting as a bridge between the flash memory card from digital camera MP3 player PDA or mobile phone and PC PC with USB Host Controller USB Flash Card Reader Moble Phones PDA MP3 Player Digital Camera SD MMC Card PC ...

Page 8: ...APPLICATION BLOCK DIAGRAM 4 This Page Intentionally Left Blank ...

Page 9: ...ame for each pin and the table in the following page describes each pin in detail 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AU9331 28 pin SSOP NC XTAL1 XTAL2 VSSA VCCA VCC5V VCCIO USB_DM USB_DP SDA SCK VSSIO TEST NC NC PWD SDWP SDCD SDDATA SDCLK SDCMD VSSK VCCK GPI2 GPI1 GPI0 GPO7 NC ...

Page 10: ...B D 9 USB_DP I O USB D 10 SDA I O EEPROM data inout 11 SCK O EEPROM clcok 12 VSSIO PWR Ground 13 Test I Should connect to Vss 14 NC 15 NC 16 PWD O 0 Power on 1 Power down 17 SDWP I SD Write Protect 18 SDCD I SD Card Detect 19 SDDATA I O SD Card Data 20 SDCLK O SD Card Clock 21 SDCMD I O SD Card Command 22 VSSK PWR Ground 23 VCCK PWR Core 3 3V Input 24 GPI2 I Should connect to Vss 25 GPI1 I Should ...

Page 11: ...ture and Reference Design 4 1 AU9331 Block Diagram Alcor Micro AU9331 Flash Memory Card Reader BlockDiagram SD MMCcontrol S P USB SIE USB Upstream Port XCVR 3 3 V Voltage Regulator 3 3 V RAM Processor ROM 12MHz XTAL SD MMCBUS DMA Engine PLL EEPROM EEPROM Optional ...

Page 12: ...R SDCD A 1 1 Tuesday May 21 2002 2 0 AU9331 USB SD MMC CARD READER DEMO BOARD Size Document Number Rev Date Sheet of SDCMD VCCA VCC C1 0 1UF C10 0 1UF SDDATA C2 1UF SDCMD SDA Q1 1N9012 VCCA VCC VSSK R6 10K F1 FB R5 10K VSSK R12 1K C14 0 1UF C3 1UF R10 47K SDWP GPI1 C6 0 1UF C4 0 1UF VSSIO F4 FB XTAL1 VCCK F5 FB F3 FB VCC3 3 R9 1M C7 0 1UF D1 C12 0 1UF VCC3 3 C5 0 1UF ACTIVITY LED SDWP R4 330 R1 1 ...

Page 13: ...current no pull up or pull down 1 1 µA IIH Input high current no pull up or pull down 1 1 µA IOZ Tri state leakage current 10 10 µA CIN Input capacitance 5 ρF COUT Output capacitance 5 ρF CBID Bi directional buffer capacitance 5 ρF 5 3 DC Electrical Characteristics for 3 3 volts operation SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIL Input Low Voltage CMOS 0 9 V VIH Input Hight Voltage CMOS 2 ...

Page 14: ... following setup was used to measure the open loop voltage gain for crystal oscillator circuits The feedback resistor serves to bias the circuit at its quiescent operating point and the AC coupling capacitor Cs is much larger than C1 and C2 M IN M XIN XOUT Rf 1M Ohm Cs C1 18pF C2 18pF C3 10pF ...

Page 15: ...by sudden application of a high voltage supplied by a 100 PF capacitor through 1 5 Kohm resistance Machine Model stresses devices by sudden application of a high voltage supplied by a 200 PF capacitor through very low 0 ohm resistance Test circuit condition Zap Interval 1 second Number of Zaps 3 positive and 3 negative at room temperature Critera I V Curve Tracing Model Model S S TARGET Results HB...

Page 16: ...d the DUT was biased for 0 5 seconds If neither the PUT current supply nor the device current supply reached the predefined limit DUT 0 mA Icc 100 mA then the voltage was increased by 0 1 Volts and the pin was tested again This procedure was recommended by the JEDEC JC 40 2 CMOS Logic standardization committee Notes 1 DUT Device Under Test 2 PUT Pin Under Test Vcc DUT GND Pin under m Untested Outp...

Page 17: ...rce V Supply Icc Measurement Test Circuit Negative Input Output Overvoltage Overcurrent 1 Source Vcc DUT GND mA Untested Output Open Circuit All Input Tied to V supply V Supply Icc Measurement Supply Voltage test Latch Up Data Model Model Voltage v Current mA S S Results Voltage 11 0 11 0 5 Pass Current 200 200 5 Vdd Vxx 9 0 5 Pass ...

Page 18: ...ELECTRICAL CHARACTERISTICS 14 This Page Intentionally Left Blank ...

Page 19: ...MECHANICAL INFORMATION 15 6 0 Mechanical Information ...

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