5.5 LVDS INTERFACE
SIGNAL
TRANSMITTER
THC63LVDM83A
INTERFACE
CONNECTOR
RECEIVER
THC63LVDF84A
TFT CONTROL
INPUT
SELLVDS
=L
SELLVDS
=H
PIN INPUT
Host
TFT-LCD
PIN
OUTPUT
SELLVDS
=L
SELLVDS
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
RSVD 1
RSVD 2
RSVD 3
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
RSVD 1
RSVD 2
RSVD 3
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
30
50
2
8
10
16
18
25
27
28
TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8
TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27
TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25
TA OUT0+
TA OUT0-
TA OUT1+
TA OUT1-
TA OUT2+
TA OUT2-
TA OUT3+
TA OUT3-
Rx 0+
Rx 0-
Rx 1+
Rx 1-
Rx 2+
Rx 2-
Rx 3+
Rx 3-
27
29
30
32
33
35
37
38
39
43
45
46
47
51
53
54
55
1
6
7
34
41
42
49
50
2
3
5
Rx OUT0
Rx OUT1
Rx OUT2
Rx OUT3
Rx OUT4
Rx OUT6
Rx OUT7
Rx OUT8
Rx OUT9
Rx OUT12
Rx OUT13
Rx OUT14
Rx OUT15
Rx OUT18
Rx OUT19
Rx OUT20
Rx OUT21
Rx OUT22
Rx OUT26
Rx OUT27
Rx OUT5
Rx OUT10
Rx OUT11
Rx OUT16
Rx OUT17
Rx OUT23
Rx OUT24
Rx OUT25
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
NC
NC
NC
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
NC
NC
NC
24
bit
DCLK
31
TxCLK IN TxCLK OUT+
TxCLK OUT-
RxCLK IN+
RxCLK IN-
26 RxCLK
OUT
DCLK
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.
Version 1.0
46
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