DSP JTAG
JP2,JP3 settings:
1) play mode : all Jumps off
2) burn flash mode : JP3's 1-2 short only
3)debug mode: JP2's 1-2 short only
Reset
circuit
PCLK
GCLKP
FPCCLK
MIRR
DEFECT
NMI
AMUTE
AIN
FS1
FS3
FS2
MD
MC
ML
DUPTD1
DUPRD1
I2CCLK
I2CDAT
RAMADD5
RAMADD0
RAMADD4
RAMD
AT4
RAMADD8
RAMD
AT9
RAMRA
S-
RAMD
AT1
RAMADD6
RAMADD10
RAMDA
T14
RAMD
AT6
RAMD
AT2
RAMDA
T13
RAM
WE-
RAMDQ
M
RAMD
AT0
RAMD
AT8
RAMDA
T11
RAMDA
T12
RAMDQ
M
RAMADD3
RAMADD1
RAMADD7
RAMADD2
RAM
BA
RAMD
AT7
RAMADD9
RAMCA
S-
RAMCS0-
RAMDA
T15
PCLK
RAMD
AT5
RAMDA
T10
RAMD
AT3
RAMDA
T12
RAMCS1-
RAMADD1
RAMD
AT0
RAMADD7
RAMADD0
RAMDA
T11
RAMDA
T10
RAMD
AT3
RAMD
AT2
RAMD
AT6
PCLK
RAMDA
T13
RAMDQ
M
RAMD
AT1
RAMDQ
M
RAMCA
S-
RAMD
AT8
RAMADD10
RAMDA
T15
RAMD
AT4
RAMADD2
RAM
WE-
RAM
BA
RAMRA
S-
RAMADD9
RAMADD4
RAMADD5
RAMD
AT9
RAMD
AT7
RAMADD3
RAMDA
T14
RAMADD6
RAMADD8
RAMD
AT5
MEMDA8
AOUT1
MEMDA7
DJTDO
RAMADD1
MEMDA15
TRAY_CLOSE
HOME
ICETDI
DUPRD0
RAMDA
T14
RAMD
AT3
MEMAD4
RAMD
AT4
RAMADD3
MEMCS1-
RAMCS1-
RAMADD7
MEMDA9
MEMAD20
MEMDA13
MEMAD16
DJTDI
MEMAD5
AOUT0
XO
RAMD
AT2
RAMD
AT8
MEMDA2
MEMDA11
MEMCS0-
MEMAD2
RAM
WE-
RAM
BA
RESET_
RAMD
AT0
RAMCA
S-
RAMRA
S-
RAMADD0
MEMDA4
MEMDA12
MEMAD12 PLLCFGA
GCLKP
ICETMS
AOUT2
RAMDA
T13
RAMDA
T11
RAMD
AT6
RAMADD9
RAMADD4
MEMAD6
MEMDA3
DJTMS
ICETDO
IALRCLK
IABCLK
LDON
MEMDA14
MEMAD10
TOUT_SW
ICETCK
RAMDA
T15
RAMD
AT9
RAMADD2
MEMAD17
MEMAD9
MEMAD11 PLLCFGP
MEMAD13
MEMAD3
RAMDA
T10
MEMDA0
SPDIF
IAMCLK
RAMD
AT7
RAMADD8
MEMAD8
MEMDA6
MEMAD14
MEMAD15
FPCSTRB
IRRCV
MEMAD1
GPAIO
RAMD
AT5
IPCLK
RAMDQ
M
RAMADD10
RAMADD5
DUPTD0
SMUTE
RAMCS0-
TIN_SW
MEMRD-
CJTCK
RAMDA
T12
MEMDA1
MEMAD18
MEMDA10
MEMWR-
RAMD
AT1
RAMADD6
MEMAD7
MEMDA5
FPCRX
TRAY_OPEN
MEMAD19
MEMAD0
XO
FPCTX
AOUT3
SPLD_PULSE
MVREF2A
FOCUS_OUT
TRACK_OUT
DSPVCC18
VDDAFES
VDDAFERF
VDDDACS
VDDDACS
VDDAFERF
VDDAFES
DSPVCC33
DSPVCC33
SDRAMVCC
SGND
VDDDAC
VDDDAC
VGND
AFEGND
SGND
VGND
SDRAMVCC
DSPVCC18
DSPVCC33
AFEGND
DSPVCC33
DSPVCC18
VGND
SDRAMVCC
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
C53
10nF
+
CE2
470uF/16V
R24
4.7K
C55
1nF
R27
0R
C56
1nF
R26
0R
R22
NC
+
CE3
22uF/16V
R25
NC
+
CE1
470uF/16V
R21
4.7K
TP98
1
.
R188
33
D6
RLS4148 (NC)
U2
ZR36768
12
1
2
3
4
5
6
7
8
9
10
11
50
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
51
52
53
54
55
62
56
57
58
59
60
61
72
63
64
65
66
67
68
69
70
71
83
73
74
75
76
77
78
79
80
81
82
91
84
85
86
87
88
89
90
101
92
93
94
95
96
97
98
99
100
102
103
104
105
156
155
154
152
151
145
136
144
143
142
141
140
139
138
127
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
205
204
202
192
190
200
187
195
197
186
185
184
175
174
173
172
171
157
169
160
167
165
164
163
162
161
159
158
39
40
41
42
43
44
45
46
47
48
49
106
107
108
109
126
128
129
130
131
132
133
134
135
137
146
147
148
149
150
153
166
168
170
183
182
181
180
179
178
177
176
188
189
191
193
194
196
198
199
201
203
206
207
208
GNDP
SSCRXD/GPCIO[17]
MEMCS[1]#/GPCIO[18]
VDDP
MEMAD[15]/PLLPROG[0]
MEMAD[16]/PLLPROG[1]
MEMAD[14]/PLLPROG[2]
MEMAD[13]/AFETESTEN
MEMAD[12]/[PLLCFGA]
MEMDA[15]
MEMAD[11]/[PLLCFGP]
MEMDA[7]
GNDP
MEMAD[10]/[TESTMODE]
MEMDA[14]
MEMAD[9]
MEMDA[6]
MEMAD[8]
MEMDA[13]
MEMDA[5]
MEMAD[20]/[GPCIO19]/[MEMCS#2]
VDDP
MEMDA[12]
MEMWR#
MEMDA[4]
VDDC
MEMDA[11]
MEMDA[3]
MEMAD[19]/[PLLSEL]
GNDC
MEMDA[10]
MEMAD[18]
GNDP
MEMDA[2]
MEMAD[17]
MEMDA[9]
MEMAD[7]
MEMDA[1]
MEMAD[6]
VDD-IP
VDDP
RAMADD[4]
RAMADD[3]
RAMADD[5]
GNDP
RAMADD[2]
RAMADD[6]
VDDP
RAMADD[1]
RAMADD[7]
RAMADD[0]
GNDP
RAMADD[8]
VDDC
RAMADD[10]
GNDC
RAMADD[9]
VDDP
RAMADD[11]
RAMCS[0]#/RAMBA[1]
RAMBA[0]
GNDP
RAMCS[1]#
RAMRAS#
RAMCAS#
VDDP
RAMWE#
RAMDQM
GNDPCLK
PCLK
VDDPCLK
RAMDAT[8]
GNDP
RAMDAT[7]
RAMDAT[9]
RAMDAT[6]
VDDP
RAMDAT[10]
RAMDAT[5]
RAMDAT[11]
GNDP
RAMDAT[4]
VDDC
RAMDAT[12]
GNDC
RAMDAT[3]
VDDP
RAMDAT[13]
RAMDAT[2]
RAMDAT[14]
RAMDAT[1]
RAMDAT[15]
RAMDAT[0]
VDDP
DUPTD1/GPCIO38
DUPRD1/GPCIO37
VDD-IP
DUPRD0/GPCIO35
GNDP
GPCI/O[32]
GPCI/O[31]
VDDP
GCLKA
GCLKP
XO
VDDA
RESET#
GNDA
VDDP
GNDP
HSYNC/GPCIO25/[CJTDO]
VDDC
VSYNC/GPCIO24/[CJTDI]
GNDC
AIN/[GPCIO23/CJTCK]
VDDP-A2
AMCLK
GNDP-A2
ABCLK
ALRCLK
GPAIO/[AOUT3]
AOUT[0]
AOUT[1]/[GPCIO22]
AOUT[2]/[GPCIO21]
SPDIF
SLEDPULSE/IDGPCIO6
VDDP
GNDP
VDDC
GNDC
DEFECT/IDGPCIO5
PWMACT[0]/GPCIO39
GNDPWM
VDDPWM
GNDAFES
VBIASS1
VBIASS0
VDDAFES
GNDAFERF
RFINN
RFINP
VDDAFERF
GNDDACD
DACDRIVE[1]
VDDDAC
DACDRIVE[0]
GNDDACBS2
GNDDACP
RSET
C/B/U
Y/R/V/[C]
CVBS/C/[Y]
CVBS/G/Y
MEMDA[8]
MEMAD[5]
VDDP
MEMDA[0]
MEMAD[4]
MEMRD#
MEMAD[3]
MEMAD[2]
MEMCS[0]#
MEMAD[1]/[BOOTSEL2]
MEMAD[0]/[A]PLLSEL/[BOOTSEL1]
CPUNMI/GPCIO[20]
GNDP
[A]GPCIO110/BOOTSEL1/[AOUT3/ICGPCIO0]
[A]GPCIO111/BOOTSEL2/[IDGPCIO0]
COSYNC/GPCIO120/[ICGPCIO1/CJTMS]
GPCIO26/ICETMS/[DJTMS]
ICETDI/GPCIO122/[ICGPCIO2/DJTDI]
ICETDO/GPCIO123/[IDGPCIO1/DJTDO]
ICETCK/GPCIO27/[DJTCK]
GPCIO28/DJTMS
GPCIO29/DJTDI
GPCIO30/DJTDO
GPCIO128/DJTCK/[ICGPCIO3]
GPCI/O[130]/[IDGPCIO2]
GPCI/O[135]/[ICGPCIO4]
GPCI/O[33]
GPCI/O[137]/[ICGPCIO5]
GPCI/O[34]
GPCI/O[139]/[IDGPCIO3]
DUPTD0/GPCIO36
GNDDACPS
VDDDACS
GNDDACDS
ADCIN0
ADCIN1
ADCIN2
ADCIN3
ADCIN4
ADCIN5
ADCIN6
ADCIN7
PWMACT[1]/GPCIO40
PWMCO[0]/GPCIO41
PWMCO[1]/GPCIO42
PWMCO[2]/GPCIO43
PWMCO[3]/GPCIO44
PWMCO[4]/GPCIO45
PWMCO[5]/GPCIO46
PWMCO[6]/GPCIO152/[IDGPCIO4]
ICGPCIO6
GPCIO159/[ICGPCIO7]
SPINDLEDPULSE/IDGPCIO7
SSCCLK/GPCIO47
SSCTXD/GPCIO16
TP24
1
.
C25
0.1uF
C8
0.22uF (NC)
JP4
JUMPER
1
2
R17
75R/1%
C15
0.1uF
C16
0.1uF
R18
75R/1%
C27
0.1uF
C17
0.1uF
R19
75R/1%
R134
330R
TP7
1
.
R77
10K (NC)
TP3
1
.
C11
24pF
C18
10nF
C23
0.1uF
C28
0.1uF
R20
75R/1%
C19
10nF
C13
220pF
C20
1nF
TP6
1
.
C29
0.1uF
TP2
1
.
R28
1M
C21
1nF
CE5
10u/16V(NC)
L1
2.7uH
C30
0.1uF
R75
10K (NC)
R38
4.7K
Q6
2N3904
C31
0.1uF
R187 0R
C32
0.1uF
C33
0.1uF
C36
10nF
TP4
1
.
C37
10nF
U3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
BA
A10/AP
A0
A1
A2
A3
VDD
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
R170
2k
R169
4.7k
Q5
2N3904
R145
4.7k
C38
10nF
JP3
CN2.54MM3P-M(BOOTSEL1)
1
2
3
JP2
CN2.54MM3P-M(BOOTSEL2)
1
2
3
C40
10nF
C12
24pF
+
CE4
22uF/16V
C41
1nF
R33
33
U4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
BA
A10/AP
A0
A1
A2
A3
VDD
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
C42
1nF
R39
4.7K
C43
1nF
R40
4.7K
R34
33
JP5
JUMPER
1
2
R37
75
R35
33
C48
0.1uF
C51
0.1uF
C52
0.1uF
FB36
R182
33
R181
33
R180
33
R15
392R/1%
R184
33
R183
33
R185
33
R186
33
C49
0.1uF
C35
10nF
C50
0.1uF
Y1
27.000MHz
MEMDA[15:0]
MEMAD[20:0]
MEMCS0-
MEMRD-
AIN
AMCLK
ABCLK
ALRCLK
AOUT0
AOUT1
AOUT2
SPDIF
CVBS_G_Y
CVBS_C
Y_R_V
C_B_U
VDDAFERF
VDDAFES
DSPVCC18
GND
VDDDACS
SPINDLE_PWM
SLED_PWM
LDON
RFA_SDEN
VDDDAC
DUPTD1
DUPTD0
DUPRD0
DUPRD1
DSPVCC33
VBIASS0
AAF_
PI
AAF_CE
RFINN
RFINP
FPCTX
IRRCV
FOCUS_DAC
MEMCS1-
FPCSTRB
FPCCLK
FPCRX
RFA_DATA
AAF_FE
TRACK_D
AC
VBIASS1
AAF_
TE
MIRR
DEFECT
MEMWR-
RFA_SCLK
AMUTE
FS1
FS2
FS3
MD
MC
ML
SMUTE
HOME
I2CCLK
I2CDAT
TRAY_CLOSE
TIN_SW
TOUT_SW
TRAY_OPEN
LINK
SPDIF_IN_AUTO
SPDIF_IN_ERF
SPDIF_CS
SPDIF_IN_FS96
SPDIF_IN_SEL
AOUT3
SPDIF_DTO
RESET_
SPLD_PULSE
MVREF2A
FOCUS_OUT
TRACK_OUT
42
41
NOTES:
1. All resistance values are indicated in "ohms"(k=1000 ohms. M=1000 Kohms).
2. All capacitance values are indicated in "µF" (p=10 µF).
-6
DECODE SECTION
Summary of Contents for DVR4200SS
Page 1: ...SERVICE MANUAL Model DV R4200SS DVD HOME THEATER SYSTEM www akai ru ...
Page 15: ...SUBWOOFER MAIN PCB ASW3 01 01 26 25 ...
Page 16: ...MPEG SERVO PCB TOP VIEW STS71AAST 01 05 28 27 ...
Page 17: ...MPEG SERVO PCB BOTTOM VIEW STS71AAST 01 05 30 29 ...
Page 48: ...92 91 EXPLODED DRAWINGS MAIN UNIT DVD MECHANISM STSD 010SMT ...
Page 49: ...94 93 ACTIVE SUB WOOFER ASWT1 ...
Page 50: ... 4 SPEAKER SSQE3 96 95 ...
Page 51: ... CENTER SPEAKER SSQCE3 97 Printed in China December 2003 808 25EAST 020 ...
