Akai 29CT24FS, Service Manual

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SERVICE MANUAL
3) Pin Configuration
8-lead MAP
8-lead TSSOP
Pin Name Function
A0-A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
A0
A1
A2
GND
8
7
6
5 VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
1
2
3
4
A0
A1
A2
GND
Bottom View
Fig. 13
8-lead SOIC
8-pin PDIP
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
8
7
6
5
1
2
3
4
1
2
3
4 VCC
WP
SCL
SDA
A0
A1
A2
GND
Fig. 14
4) Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain
driven and may be wired with any number of other open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that
are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be
addressed on a single bus system (device addressing is discussed in detail under the Device
Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices
may be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are no connects.
The AT24C16 does not use the device address pins, which limits the number of devices on a single
bus to one. The A0, A1 and A2 pins are no connects.
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