Aiwa XR-MK220, Service Manual

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70 AVDD DAC – Analog power supply (DAC) 3.3V.
71 AGND DAC – Analog ground.
72 RREF I Reference resistor input.
73 VREF I Voltage reference input. (Not used)
74 AVDD DAC – Analog power supply (DAC) : 3.3V.
75 C OUT O Video signal “C” out. (Not used)
76 AGND DAC – Analog ground.
77 ~ 79 CLK SEL(0) ~ (2) I Clock selection input.
80 VSS – Ground.
81 CLK SEL(3) I Clock selection input.
82 VDD3 – Power supply 3.3V.
83 ~ 84 CLK SEL(4) ~ (5) I Clock selection input.
85 AGND PLL – Analog ground.
86 DA XCK I DA XCK (16.933MHz) input.
87 AVDD PLL – Analog power supply 3.3V.
88 DA EMP O DAC-emphasis output.
89 ~ 90 PGIO5 ~ 6
91 PGIO0 I/O Programmable I/O. (Not used)
92 PGIO8
93 VSYNC/CSYNC O VSYNC/CSYNC output. (Not used)
94 AVDD PLL – Analog power supply (PLL) 3.3V.
95 NC – Connected to VSS through a resistor.
96 ~ 97 NC – Not connected.
98 AGND PLL – Analog ground.
99 VSS – Ground.
100 NC – Not connected.
101 HSYNC O HSYNC output. (Not used)
102 VDD3 – Power supply 3.3V.
103 VCK OUT O VCK out. (Not used)
104 VSS – Ground.
105 GCK I Global clock signal input. (42.3MHz) (Not used)
106 VCK IN I Video clock signal input. (27.0MHz)
107 GCK OUT O Global clock signal output. (27.0MHz)
108 DA LRCK O DAC-LRCK output.
109 VDD MAX OUT – Power supply (VDD MAX) : 5.0V.
110 DA DATA O DAC-PCM data output.
111 DA BCK O DAC-BIT clock output.
112 HD OUT O Micon interface. (Data out)
113 HRDY O Micon interface. (Host ready)
114 HINT O Micon interface. (Host interrupt)
115 CDG SCK I CD-G serial clock input.
Pin No. Pin Name I/O Description
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Q Q
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