41
76
CNIN
I
Track jump count signal input.
77
DATO
O
Serial data output to SSP.
78
XLTO
O
Serial data latch output to SSP. Latched at the falling edge.
79
CLKO
O
Serial data transfer clock output to SSP.
80
MIRR
I
Mirror signal input. Used when the number of tracks is 128 or more for the 2N-track jump and M
track move of the auto sequencer.
Notes:
The 64-bit slot is an LSB first, twos complement output, and the 48-bit slot is an MSB first, twos complement output.
GTOP is used to monitor the frame sync protection status. (High: sync protection window open.)
XUGF is the negative pulse for the frame sync obtained from the EFM signal. It is the signal before sync protection.
XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM signal transition point
coincide.
GFS goes high when the frame sync and the insertion protection timing match.
RFCK is derived from the crystal accuracy, and has a cycle of 136µ.
C2PO represents the data error status.
XRAOF is generated when the 32K RAM exceeds the ±28F jitter margin.
Pin No.
Pin Name
I/O
Description
1
VAD
ADC voltage supply terminal.
2
MICI
I
MIC LPF input terminal.
3
LPFO1
O
MIC LPF output terminal.
4
VRA1
ADC reference voltage terminal.
5
AIL
I
LPF input terminal for L-ch line input.
6
LPFO2
O
LPF output terminal for L-ch line input.
ADC reference voltage terminal.
I
LPF input terminal for R-ch line input.
LPF output terminal for L-ch line input.
ADC ground terminal.
I
L-ch analog additional input terminal. (Not used)
L-ch digital input 0 detect terminal. (Not used)
DAC ground terminal.
14
AOL
O
L-ch DAC output terminal.
15
VR2
DAC reference voltage terminal.
16
AOR
O
R-ch DAC output terminal.
17
VDA
DAC voltage supply terminal.
18
RZ
O
R-ch digital input 0 detect terminal. (Not used)
19
RI
I
R-ch analog additional terminal. (Not used)
IC, TC9409BF
Pin No.
Pin Name
I/O
Description
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