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TRDR
FFDR
FRDR
VDD
VSS
TEST
TES1
XTSL
VC
FE
SE
TE
CE
RFDC
ADIO
AVSS0
ICEN
AVDD0
ASYO
ASYI
RFAC
AVSS3
CLTV
FILO
FILI
PCO
DOUT
ASYE
VDD
LRCK
LRCKI
PCMD
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Tracking drive output.
Focus drive output.
Focus drive output.
Digital power.
Digital ground.
Test terminal. Normally ground.
Test terminal. Normally ground.
Crystal selection input terminal. Sets “L” when crystal is 16.9344 MHz. Sets “H” when crystal
is 33.8688 MHz.
Center voltage input.
Focus error signal input.
Sled error signal input.
Tracking error signal input.
Center servo analog input.
RF signal input.
Not used.
Analog ground.
Constant current input for OP amplifier.
Analog power.
EFM full-swing output. (“L” = VSS, “H” = VDD)
Asymmetry comparator voltage input.
EFM signal input.
Analog ground.
VCO1 control voltage input for doubling.
Filter output for master PLL (slave = digital PLL).
Filter input for master PLL.
Charge pump output for master PLL.
Analog power supply.
Asymmetry circuit constant current input.
VCO2 control voltage input for wide band EFM PLL.
VCO2 oscillator output for band range EFM PLL. Clock input for wide band EFM PLL
switched by command.
Charge pump output for wide band EFM PLL.
Digital ground.
Digital-out ON/OFF control (“L” = OFF, “H” = ON).
Digital-out output terminal.
Asymmetry circuit ON/OFF (“L” = OFF, “H” = ON).
Digital power.
D/A interface. LR clock output f = Fs.
D/A interface. LR clock input.
D/A interface. Serial data output (2’s COMP, MSB fast).
Pin No.
Pin Name
I/O
Description
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