-20-
Pin No.
Pin Name
I/O
Description
X2
X1
VSS0
VDD0
XT2
XT1
IC/VPP
P45
P44
P43
P42
P41, P40
—
I
—
—
—
I
—
O
O
O
O
O
Terminal to connect external crystal for main system clock oscillation.
Ground potential of port section.
Positive polarity power supply for port section.
Not connected.
Terminal to connect external crystal for sub system clock oscillation. (Connected to Ground)
This pin is internally connected. Connect this pin directly to Vss0 or Vss1.
Signal name: SDBY. H: Output amplifier operates.
Signal name: MUTE. H: MUTE ON (Output amplifier).
Signal name: DSL1. L: DSL ON (Step 1).
Signal name: DSL2. H: DSL ON (Step 2) (When DSL1 is H).
Not connected.
68
69
70
71
72
73
74
75
76
77
78
79, 80
IC DESCRIPTION-2/3 (µPD789406AGC-014)-2/2
Summary of Contents for XP-V320
Page 8: ...8 FL AHC 7 GRID ASSIGNMENT ANODE CONNECTION 1 1 GRID ASSIGNMENT ANODE CONNECTION...
Page 10: ...10 SCHEMATIC DIAGRAM 1 1 16P H Toc A 6P 2HV...
Page 11: ...11 IC101 IC201 Q305 TEST MODE SHORT LAND RF VC IC301 IC351 IC801 27 IC701 31 TEST MODE 1 3...
Page 27: ...27 CD MECHANISM EXPLODED VIEW 1 1 DA23L 2 4 5 9 3 1 8 7 10 D D A C B 6...
